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存储系统 缓存.DRAM.磁盘（Memory Systems: Cache, DRAM, Disk） Bruce Jacob.pdf

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    In Praise of Memory Systems: Cache, DRAM, Disk
    Memory Systems Cache, DRAM, Disk
    Copyright Page
    Contents
    Preface
    Overview. On Memory Systems and Their Design
    Ov.1 Memory Systems
    Ov.2 Four Anecdotes on Modular Design
    Ov.2.1 Anecdote I: Systemic Behaviors Exist
    Ov.3 Cross-Cutting Issues
    Ov.3.1 Cost/Performance Analysis
    Ov.3.2 Power and Energy
    Ov.4 An Example Holistic Analysis
    Ov.5 What to Expect
    Part I. Cache
    Chapter 1. An Overview of Cache Principles
    1.1 Caches, ‘Caches,’ and “Caches”
    1.2 Locality Principles
    1.3 What to Cache, Where to Put It, and How to Maintain It
    1.4 Insights and Optimizations
    Chapter 2. Logical Organization
    2.1 Logical Organization: A Taxonomy
    2.2 Transparently Addressed Caches
    2.3 Non-Transparently Addressed Caches
    2.4 Virtual Addressing and Protection
    2.5 Distributed and Partitioned Caches
    2.6 Case Studies
    Chapter 3. Management of Cache Contents
    3.1 Case Studies: On-Line Heuristics
    3.2 Case Studies: Off-Line Heuristics
    3.3 Case Studies: Combined Approaches
    3.4 Discussions
    3.5 Building a Content-Management
    Chapter 4. Management of Cache Consistency
    4.1 Consistency with Backing Store
    4.2 Consistency with Self
    4.3 Consistency with Other Clients
    Chapter 5. Implementation Issues
    5.1 Overview
    5.2 SRAM Implementation
    5.3 Advanced SRAM Topics
    5.4 Cache Implementation
    Chapter 6. Cache Case Studies
    6.1 Logical Organization
    6.2 Pipeline Interface
    6.3 Case Studies of Detailed Itanium-2 Circuits
    Part II. DRAM
    Chapter 7. Overview of DRAMs
    7.1 DRAM Basics: Internals, Operation
    7.2 Evolution of the DRAM Architecture
    7.3 Modern-Day DRAM Standards
    7.4 Fully Buffered DIMM: A Compromise of Sorts
    7.5 Issues in DRAM Systems, Briefly
    Chapter 8. DRAM Device Organization: Basic Circuits and Architecture
    8.1 DRAM Device Organization
    8.2 DRAM Storage Cells
    8.3 RAM Array Structures
    8.4 Differential Sense Amplifier
    8.5 Decoders and Redundancy
    8.6 DRAM Device Control Logic
    8.7 DRAM Device Confi guration
    8.8 Data I/O
    8.9 DRAM Device Packaging
    8.10 DRAM Process Technology and Process Scaling Considerations
    Chapter 9. DRAM System Signaling and Timing
    9.1 Signaling System
    9.2 Transmission Lines on PCBs
    9.3 Termination
    9.4 Signaling
    9.5 Timing Synchronization
    9.6 Selected DRAM Signaling and Timing Issues
    9.7 Summary
    Chapter 10. DRAM Memory System Organization
    10.1 Conventional Memory System
    10.2 Basic Nomenclature
    10.3 Memory Modules
    10.4 Memory System Topology
    10.5 Summary
    Chapter 11. Basic DRAM Memory-Access Protocol
    11.1 Basic DRAM Commands
    11.2 DRAM Command Interactions
    11.3 Additional Constraints
    11.4 Command Timing Summary
    11.5 Summary
    Chapter 12. Evolutionary Developments of DRAM Device Architecture
    12.1 DRAM Device Families
    12.2 Historical-Commodity DRAM Devices
    12.3 Modern-Commodity DRAM Devices
    12.4 High Bandwidth Path
    12.5 Low Latency
    12.6 Interesting Alternatives
    Chapter 13. DRAM Memory Controller
    13.1 DRAM Controller Architecture
    13.2 Row-Buffer-Management Policy
    13.3 Address Mapping (Translation)
    13.4 Performance Optimization
    13.5 Summary
    Chapter 14. The Fully Buffered DIMM Memory System
    14.1 Introduction
    14.2 Architecture
    14.3 Signaling and Timing
    14.4 Access Protocol
    14.5 The Advanced Memory Buffer
    14.6 Reliability, Availability, and Serviceability
    14.7 FB-DIMM Performance Characteristics
    14.8 Perspective
    Chapter 15. Memory System Design Analysis
    15.1 Overview
    15.2 Workload Characteristics
    15.3 The RAD Analytical Framework
    15.4 Simulation-Based Analysis
    15.5 A Latency-Oriented Study
    15.6 Concluding Remarks
    Part III. Disk
    Chapter 16. Overview of Disks
    16.1 History of Disk Drives
    16.2 Principles of Hard Disk Drives
    16.3 Classifications of Disk Drives
    16.4 Disk Performance Overview
    16.5 Future Directions in Disks
    Chapter 17. The Physical Layer
    17.1 Magnetic Recording
    17.2 Mechanical and Magnetic Components
    17.3 Electronics
    Chapter 18. The Data Layer
    18.1 Disk Blocks and Sectors
    18.2 Tracks and Cylinders
    18.3 Address Mapping
    18.4 Zoned-Bit Recording
    18.5 Servo
    18.6 Sector ID and No-ID Formatting
    18.7 Capacity
    18.8 Data Rate
    18.9 Defect Management
    Chapter 19. Performance Issues and Design Trade-Offs
    19.1 Anatomy of an I/O
    19.2 Some Basic Principles
    19.3 BPI vs. TPI
    19.4 Effect of Drive Capacity
    19.5 Concentric Tracks vs. Spiral Track
    19.6 Average Seek
    Chapter 20. Drive Interface
    20.1 Overview of Interfaces
    20.2 ATA
    20.3 Serial ATA
    20.4 SCSI
    20.5 Serial SCSI
    20.6 Fibre Channel
    20.7 Cost, Performance, and Reliability
    Chapter 21. Operational Performance Improvement
    21.1 Latency Reduction Techniques
    21.2 Command Queueing andScheduling
    21.3 Reorganizing Data on the Disk
    21.4 Handling Writes
    21.5 Data Compression
    Chapter 22. The Cache Layer
    22.1 Disk Cache
    22.2 Cache Organizations
    22.3 Caching Algorithms
    Chapter 23. Performance Testing
    23.1 Test and Measurement
    23.2 Basic Tests
    23.3 Benchmark Tests
    23.4 Drive Parameters Tests
    Chapter 24. Storage Subsystems
    24.1 Data Striping
    24.2 Data Mirroring
    24.3 RAID
    24.4 SAN
    24.5 NAS
    24.6 iSCSI
    Chapter 25. Advanced Topics
    25.1 Perpendicular Recording
    25.2 Patterned Media
    25.3 Thermally Assisted Recording
    25.4 Dual Stage Actuator
    25.5 Adaptive Formatting
    25.6 Hybrid Disk Drive
    25.7 Object-Based Storage
    Chapter 26. Case Study
    26.1 The Mechanical Components
    26.2 Electronics
    26.3 Data Layout
    26.4 Interface
    26.5 Cache
    26.6 Performance Testing
    Part IV. Cross-Cutting Issues
    Chapter 27. The Case for Holistic Design
    27.1 Anecdotes, Revisited
    27.2 Perspective
    Chapter 28. Analysis of Cost and Performance
    28.1 Combining Cost and Performance
    28.2 Pareto Optimality
    28.3 Taking Sampled Averages Correctly
    28.4 Metrics for Computer Performance
    28.5 Analytical Modeling and the Miss-Rate Function
    Chapter 29. Power and Leakage
    29.1 Sources of Leakage in CMOS Devices
    29.2 A Closer Look at Subthreshold Leakage
    29.3 CACTI and Energy/Power Breakdown of Pipelined Nanometer Caches
    Chapter 30. Memory Errors and Error Correction
    30.1 Types and Causes of Failures
    30.2 Soft Error Rates and Trends
    30.3 Error Detection and Correction
    30.4 Reliability of Non-DRAM Systems
    30.5 Space Shuttle Memory System
    Chapter 31. Virtual Memory
    31.1 A Virtual Memory Primer
    31.2 Implementing Virtual Memory
    References
    Index
    In Praise of Memory Systems: Cache, DRAM, Disk Memory Systems: Cache, DRAM, Disk is the fi rst book that takes on the whole hierarchy in a way that is consistent, covers the complete memory hierarchy, and treats each aspect in signifi cant detail. This book will serve as a defi nitive reference manual for the expert designer, yet it is so complete that it can be read by a relative novice to the computer design space. While memory technologies improve in terms of density and performance, and new memory device technologies provide additional properties as design options, the principles and meth- odology presented in this amazingly complete treatise will remain useful for decades. I only wish that a book like this had been available when I started out more than three decades ago. It truly is a landmark publication. Kudos to the authors. —Al Davis, University of Utah Memory Systems: Cache, DRAM, Disk fi lls a huge void in the literature about modern computer architecture. The book starts by providing a high level overview and building a solid knowledge basis and then provides the details for a deep understanding of essentially all aspects of modern computer memory systems including archi- tectural considerations that are put in perspective with cost, performance and power considerations. In addi- tion, the historical background and politics leading to one or the other implementation are revealed. Overall, Jacob, Ng, and Wang have created one of the truly great technology books that turns reading about bits and bytes into an exciting journey towards understanding technology. —Michael Schuette, Ph.D., VP of Technology Development at OCZ Technology This book is a critical resource for anyone wanting to know how DRAM, cache, and hard drives really work. It describes the implementation issues, timing constraints, and trade-offs involved in past, present, and future designs. The text is exceedingly well-written, beginning with high-level analysis and proceeding to incredible detail only for those who need it. It includes many graphs that give the reader both explanation and intuition. This will be an invaluable resource for graduate students wanting to study these areas, implementers, designers, and professors. —Diana Franklin, California Polytechnic University, San Luis Obispo Memory Systems: Cache, DRAM, Disk fi lls an important gap in exploring modern disk technology with accu- racy, lucidity, and authority. The details provided would only be known to a researcher who has also contributed in the development phase. I recommend this comprehensive book to engineers, graduate students, and research- ers in the storage area, since details provided in computer architecture textbooks are woefully inadequate. —Alexander Thomasian, IEEE Fellow, New Jersey Institute of Technology and Thomasian and Associates Memory Systems: Cache, DRAM, Disk offers a valuable state of the art information in memory systems that can only be gained through years of working in advanced industry and research. It is about time that we have such a good reference in an important fi eld for researchers, educators and engineers. —Nagi Mekhiel, Department of Electrical and Computer Engineering, Ryerson University, Toronto This is the only book covering the important DRAM and disk technologies in detail. Clear, comprehensive, and authoritative, I have been waiting for such a book for long time. —Yiming Hu, University of Cincinnati
    Memory is often perceived as the performance bottleneck in computing architectures. Memory Systems: Cache, DRAM, Disk, sheds light on the mystical area of memory system design with a no-nonsense approach to what matters and how it affects performance. From historical discussions to modern case study examples this book is certain to become as ubiquitous and used as the other Morgan Kaufmann classic textbooks in computer engineering including Hennessy and Patterson’s Computer Architecture: A Quantitative Approach. —R. Jacob Baker, Micron Technology, Inc. and Boise State University. Memory Systems: Cache, DRAM, Disk is a remarkable book that fi lls a very large void. The book is remarkable in both its scope and depth. It ranges from high performance cache memories to disk systems. It spans circuit design to system architecture in a clear, cohesive manner. It is the memory architecture that defi nes modern computer systems, after all. Yet, memory systems are often considered as an appendage and are covered in a piecemeal fashion. This book recognizes that memory systems are the heart and soul of modern computer systems and takes a ‘holistic’ approach to describing and analyzing memory systems. The classic book on memory systems was written by Dick Matick of IBM over thirty years ago. So not only does this book fi ll a void, it is a long-standing void. It carries on the tradition of Dick Matick’s book extremely well, and it will doubtless be the defi nitive reference for students and designers of memory systems for many years to come. Furthermore, it would be easy to build a top-notch memory systems course around this book. The authors clearly and succinctly describe the important issues in an easy-to-read manner. And the fi gures and graphs are really great—one of the best parts of the book. When I work at home, I make coffee in a little stove-top espresso maker I got in Spain. It makes good coffee very effi ciently, but if you put it on the stove and forget it’s there, bad things happen—smoke, melted gasket—‘burned coffee meltdown.’ This only happens when I’m totally engrossed in a paper or article. Today, for the fi rst time, it happened twice in a row—while I was reading the fi nal version of this book. —Jim Smith, University of Wisconsin—Madison
    Memory Systems Cache, DRAM, Disk
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    Memory Systems Cache, DRAM, Disk Bruce Jacob University of Maryland at College Park Spencer W. Ng Hitachi Global Storage Technologies David T. Wang MetaRAM With Contributions By Samuel Rodriguez Advanced Micro Devices AMSTERDAM BOSTON HEIDELBERG LONDON NEW YORK OXFORD PARIS SAN DIEGO SAN FRANCISCO SINGAPORE SYDNEY TOKYO Morgan Kaufmann is an imprint of Elsevier
    Publisher Acquisitions Editor Publishing Services Manager Senior Production Editor Developmental Editor Assistant Editor Cover Design Text Design Composition Interior printer Cover printer Denise E.M. Penrose Chuck Glaser George Morrison Paul Gottehrer Nate McFadden Kimberlee Honjo Joanne Blank Dennis Schaefer diacriTech Maple-Vail Book Manufacturing Group Phoenix Color Morgan Kaufmann Publishers is an imprint of Elsevier. 30 Corporate Drive, Suite 400, Burlington, MA 01803, USA This book is printed on acid-free paper. © 2008 by Elsevier Inc. All rights reserved. Designations used by companies to distinguish their products are often claimed as trademarks or registered trademarks. In all instances in which Morgan Kaufmann Publishers is aware of a claim, the product names appear in initial capital or all capital letters. Readers, however, should contact the appropriate companies for more complete information regarding trademarks and registration. No part of this publication may be reproduced, stored in a retrieval system, or transmitted in any form or by any means—electronic, mechanical, photocopying, scanning, or otherwise—without prior written permission of the publisher. Permissions may be sought directly from Elsevier’s Science & Technology Rights Department in Oxford, UK: phone: (+44) 1865 843830, fax: (+44) 1865 853333, E-mail: permissions@elsevier.com. You may also complete your request online via the Elsevier homepage (http://elsevier.com), by selecting “Support & Contact” then “Copyright and Permission” and then “Obtaining Permissions.” Library of Congress Cataloging-in-Publication Data Application submitted ISBN: 978-0-12-379751-3 For information on all Morgan Kaufmann publications, visit our Web site at www.mkp.com or www.books.elsevier.com Printed in the United States of America 08 09 10 11 12 5 4 3 2 1 Working together to grow libraries in developing countries www.elsevier.com | www.bookaid.org | www.sabre.org
    Dedication Jacob To my parents, Bruce and Ann Jacob, my wife, Dorinda, and my children, Garrett, Carolyn, and Nate Ng Dedicated to the memory of my parents Ching-Sum and Yuk-Ching Ng Wang Dedicated to my parents Tu-Sheng Wang and Hsin-Hsin Wang
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