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mipi_CSI-2_specification_v2-1-2018.pdf
Contents
Figures
Tables
Release History
1 Introduction
1.1 Scope
1.2 Purpose
2 Terminology
2.1 Use of Special Terms
2.2 Definitions
2.3 Abbreviations
2.4 Acronyms
3 References
4 Overview of CSI-2
5 CSI-2 Layer Definitions
6 Camera Control Interface (CCI)
6.1 CCI (I2C) Data Transfer Protocol
6.1.1 CCI (I2C) Message Type
6.1.2 CCI (I2C) Read/Write Operations
6.2 CCI (I3C) Data Transfer Protocol
6.2.1 CCI (I3C SDR) Data Transfer Protocol
6.2.2 CCI (I3C DDR) Data Transfer Protocol
6.3 CCI (I3C) Error Detection and Recovery
6.3.1 CCI (I3C SDR) Error Detection and Recovery Method
6.3.2 CCI (I3C DDR) Error Detection and Recovery Method
6.3.3 Error Detection and Recovery for CCI (I3C) Master Devices
6.4 CCI (I2C) Slave Addresses
6.5 CCI (I3C) Slave Addresses
6.6 CCI Multi-Byte Registers
6.6.1 Overview
6.6.2 Transmission Byte Order for Multi-Byte Register Values
6.6.3 Multi-Byte Register Protocol (Informative)
6.7 CCI I/O Electrical and Timing Specifications
7 Physical Layer
7.1 D-PHY Physical Layer Option
7.1.1 D-PHY v2.1 Compatibility with D-PHY v2.0 (Informative)
7.2 C-PHY Physical Layer Option
8 Multi-Lane Distribution and Merging
8.1 Lane Distribution for the D-PHY Physical Layer Option
8.2 Lane Distribution for the C-PHY Physical Layer Option
8.3 Multi-Lane Interoperability
8.3.1 C-PHY Lane De-Skew
9 Low Level Protocol
9.1 Low Level Protocol Packet Format
9.1.1 Low Level Protocol Long Packet Format
9.1.2 Low Level Protocol Short Packet Format
9.2 Data Identifier (DI)
9.3 Virtual Channel Identifier
9.4 Data Type (DT)
9.5 Packet Header Error Correction Code for D-PHY Physical LayerOption
9.5.1 General Hamming Code Applied to Packet Header
9.5.2 Hamming-Modified Code
9.5.3 ECC Generation on TX Side
9.5.4 Applying ECC on RX Side (Informative)
9.6 Checksum Generation
9.7 Packet Spacing
9.8 Synchronization Short Packet Data Type Codes
9.8.1 Frame Synchronization Packets
9.8.2 Line Synchronization Packets
9.9 Generic Short Packet Data Type Codes
9.10 Packet Spacing Examples Using the Low Power State
9.11 Latency Reduction and Transport Efficiency (LRTE)
9.11.1 Interpacket Latency Reduction (ILR)
9.11.2 Using ILR and Enhanced Transport Efficiency Together
9.11.3 LRTE Register Tables
9.12 Data Scrambling
9.12.1 CSI-2 Scrambling for D-PHY
9.12.2 CSI-2 Scrambling for C-PHY
9.12.3 Scrambling Details
9.13 Packet Data Payload Size Rules
9.14 Frame Format Examples
9.15 Data Interleaving
9.15.1 Data Type Interleaving
9.15.2 Virtual Channel Identifier Interleaving
10 Color Spaces
10.1 RGB Color Space Definition
10.2 YUV Color Space Definition
11 Data Formats
11.1 Generic 8-bit Long Packet Data Types
11.1.1 Null and Blanking Data
11.1.2 Embedded Information
11.1.3 Generic Long Packet Data Types 1 Through 4
11.2 YUV Image Data
11.2.1 Legacy YUV420 8-bit
11.2.2 YUV420 8-bit
11.2.3 YUV420 10-bit
11.2.4 YUV422 8-bit
11.2.5 YUV422 10-bit
11.3 RGB Image Data
11.3.1 RGB888
11.3.2 RGB666
11.3.3 RGB565
11.3.4 RGB555
11.3.5 RGB444
11.4 RAW Image Data
11.4.1 RAW6
11.4.2 RAW7
11.4.3 RAW8
11.4.4 RAW10
11.4.5 RAW12
11.4.6 RAW14
11.4.7 RAW16
11.4.8 RAW20
11.5 User Defined Data Formats
12 Recommended Memory Storage
12.1 General/Arbitrary Data Reception
12.2 RGB888 Data Reception
12.3 RGB666 Data Reception
12.4 RGB565 Data Reception
12.5 RGB555 Data Reception
12.6 RGB444 Data Reception
12.7 YUV422 8-bit Data Reception
12.8 YUV422 10-bit Data Reception
12.9 YUV420 8-bit (Legacy) Data Reception
12.10 YUV420 8-bit Data Reception
12.11 YUV420 10-bit Data Reception
12.12 RAW6 Data Reception
12.13 RAW7 Data Reception
12.14 RAW8 Data Reception
12.15 RAW10 Data Reception
12.16 RAW12 Data Reception
12.17 RAW14 Data Reception
12.18 RAW16 Data Reception
12.19 RAW20 Data Reception
Annex A JPEG8 Data Format (informative)
A.1 Introduction
A.2 JPEG Data Definition
A.3 Image Status Information
A.4 Embedded Images
A.5 JPEG8 Non-standard Markers
A.6 JPEG8 Data Reception
Annex B CSI-2 Implementation Example (informative)
B.1 Overview
B.2 CSI-2 Transmitter Detailed Block Diagram
B.3 CSI-2 Receiver Detailed Block Diagram
B.4 Details on the DPHY Implementation
B.4.1 CSI-2 Clock Lane Transmitter
B.4.2 CSI-2 Clock Lane Receiver
B.4.3 CSI-2 Data Lane Transmitter
B.4.4 CSI-2 Data Lane Receiver
Annex C CSI-2 Recommended Receiver Error Behavior (informative)
C.1 Overview
C.2 D-PHY Level Error
C.3 Packet Level Error
C.4 Protocol Decoding Level Error
Annex D CSI-2 Sleep Mode (informative)
D.1 Overview
D.2 SLM Command Phase
D.3 SLM Entry Phase
D.4 SLM Exit Phase
Annex E Data Compression for RAW Data Types (normative)
E.1 Predictors
E.1.1 Predictor1
E.1.2 Predictor2
E.2 Encoders
E.2.1 Coder for 10–8–10 Data Compression
E.2.2 Coder for 10–7–10 Data Compression
E.2.3 Coder for 10–6–10 Data Compression
E.2.4 Coder for 12-10-12 Data Compression
E.2.5 Coder for 12–8–12 Data Compression
E.2.6 Coder for 12–7–12 Data Compression
E.2.7 Coder for 12–6–12 Data Compression
E.3 Decoders
E.3.1 Decoder for 10–8–10 Data Compression
E.3.2 Decoder for 10–7–10 Data Compression
E.3.3 Decoder for 10–6–10 Data Compression
E.3.4 Decoder for 12–10–12 Data Compression
E.3.5 Decoder for 12–8–12 Data Compression
E.3.6 Decoder for 12–7–12 Data Compression
E.3.7 Decoder for 12–6–12 Data Compression
Annex F JPEG Interleaving (informative)
Annex G Scrambler Seeds for Lanes 9 and Above
Annex H Guidance on CSI-2 Over C-PHY ALP and PPI
H.1 CSI-2 with C-PHY ALP Mode
H.1.1 Concepts of ALP Mode and Legacy LP Mode
H.1.2 Burst Examples Using ALP Mode
H.1.3 Transmission and Reception of ALP Commands Through the PPI
H.1.4 Multi-Lane Operation Using ALP Mode
H.1.5 Concurrent LP and ALP Operation
Participants
Errata 01
26-Apr-2018
Errata for MIPI CSI-2 Specification v2.1
Errata 01 for
MIPI CSI-2 Specification
(Camera Serial Interface 2)
Specification Version 2.1
Specification Dated 14 December 2017
Specification MIPI Board Adopted 09 April 2018
Errata 01 Dated 26 April 2018
Errata MIPI Board Approved 04 May 2018
* IMPORTANT NOTE TO IMPLEMENTERS *
•
•
•
•
The issues(s) listed in this Errata document will be corrected in the next edition of this MIPI Specification.
Implementations should observe all Corrections listed here.
The location of each Correction is also marked in the attached copy of the MIPI Specification. To reduce the
risk of incorrect implementations, we suggest you consider discarding any previous copies of this MIPI
Specification not so marked.
This MIPI Specification as modified by the corrections listed in this Errata document is also a MIPI
Specification, as the MIPI Bylaws defines the term.
• MIPI member companies’ rights and obligations apply to the modified MIPI Specification as defined in
the MIPI Membership Agreement and MIPI Bylaws.
Copyright © 2018 MIPI Alliance, Inc.
All rights reserved.
Confidential
1
Errata for MIPI CSI-2 Specification v2.1
Errata 01
26-Apr-2018
1
2
3
4
5
6
The WG has identified a contradiction in the CSI-2 Specification for descriptions of RAW6 and RAW7 data
format (Section 11.4.1 and Section 11.4.2) in the CSI-2 Specification since v1.0 (including CSI-2 v1.01,
CSI-2 v1.1, CSI-2 v1.2, CSI-2 v1.3, CSI-2 v2.0, and CSI-2 v2.1).
The RAW6 and RAW7 data format descriptions describe the format as including LS/LE synchronization codes.
The WG has confirmed that line synchronization packets are optional, and the correction is to remove the second
sentence of each paragraph for RAW6 and RAW7 in order to remove the contradicting statements.
Item
Spec
Page
Number
PDF
Page
Number
1
152
172
2
153
173
Correction
Editorial or Technical: Technical
Location: Line 1719-1720
Correction: Remove sentence “Each line is separated by line start / end
synchronization codes.”
Reason: This sentence contradicts the specification statement that line
synchronization packets (LS/LE short packets) are optional. For
reference, see Section 9.8.2 Line Synchronization Packet, line
1165 stating “Line synchronization packets are optional on a per-
image-frame basis.”
Technical Impact: Hardware implementations transmitting the additional
LS/LE short packets in conjunction with this data type may wish to
make them optional in the future for users not desiring them. Any
CSI-2 verification IP reporting a non-conformance error when
LS/LE short packets are not transmitted in conjunction with this
data type must be changed in order to no longer report this error.
Editorial or Technical: Technical
Location: Line 1728-1729
Correction: Remove sentence “Each line is separated by line start / end
synchronization codes.”
Reason: This sentence contradicts the specification statement that line
synchronization packets (LS/LE short packets) are optional. For
reference, see Section 9.8.2 Line Synchronization Packet, line
1165 stating “Line synchronization packets are optional on a per-
image-frame basis.”
Technical Impact: Hardware implementations transmitting the additional
LS/LE short packets in conjunction with this data type may wish to
make them optional in the future for users not desiring them. Any
CSI-2 verification IP reporting a non-conformance error when
LS/LE short packets are not transmitted in conjunction with this
data type must be changed in order to no longer report this error.
2
Copyright © 2018 MIPI Alliance, Inc.
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Confidential
Specification for
Camera Serial Interface 2
(CSI-2SM)
Version 2.1
14 December 2017
MIPI Board Adopted 9 April 2018
This document is a MIPI Specification. MIPI member companies’ rights and obligations apply to this
Specification as defined in the MIPI Membership Agreement and MIPI Bylaws.
This document is subject to further editorial and technical development.
Copyright © 2005-2018 MIPI Alliance, Inc.
All rights reserved.
Confidential
Specification for CSI-2
Version 2.1
14-Dec-2017
NOTICE OF DISCLAIMER
The material contained herein is provided on an “AS IS” basis. To the maximum extent permitted by
applicable law, this material is provided AS IS AND WITH ALL FAULTS, and the authors and developers
of this material and MIPI Alliance Inc. (“MIPI”) hereby disclaim all other warranties and conditions, either
express, implied or statutory, including, but not limited to, any (if any) implied warranties, duties or
conditions of merchantability, of fitness for a particular purpose, of accuracy or completeness of responses,
of results, of workmanlike effort, of lack of viruses, and of lack of negligence. ALSO, THERE IS NO
WARRANTY OR CONDITION OF TITLE, QUIET ENJOYMENT, QUIET POSSESSION,
CORRESPONDENCE TO DESCRIPTION OR NON-INFRINGEMENT WITH REGARD TO THIS
MATERIAL.
IN NO EVENT WILL ANY AUTHOR OR DEVELOPER OF THIS MATERIAL OR MIPI BE LIABLE
TO ANY OTHER PARTY FOR THE COST OF PROCURING SUBSTITUTE GOODS OR SERVICES,
LOST PROFITS, LOSS OF USE, LOSS OF DATA, OR ANY INCIDENTAL, CONSEQUENTIAL,
DIRECT,
INDIRECT, OR SPECIAL DAMAGES WHETHER UNDER CONTRACT, TORT,
WARRANTY, OR OTHERWISE, ARISING IN ANY WAY OUT OF THIS OR ANY OTHER
AGREEMENT RELATING TO THIS MATERIAL, WHETHER OR NOT SUCH PARTY HAD
ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES.
The material contained herein is not a license, either expressly or impliedly, to any IPR owned or controlled
by any of the authors or developers of this material or MIPI. Any license to use this material is granted
separately from this document. This material is protected by copyright laws, and may not be reproduced,
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whether or not members of MIPI. MIPI does not make any search or investigation for IPR, nor does MIPI
require or request the disclosure of any IPR or claims of IPR as respects the contents of this material or
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Without limiting the generality of the disclaimers stated above, users of this material are further notified
that MIPI: (a) does not evaluate, test or verify the accuracy, soundness or credibility of the contents of this
material; (b) does not monitor or enforce compliance with the contents of this material; and (c) does not
certify, test, or in any manner investigate products or services or any claims of compliance with MIPI
specifications or related material.
Questions pertaining to this material, or the terms or conditions of its provision, should be addressed to:
MIPI Alliance, Inc.
c/o IEEE-ISTO
445 Hoes Lane, Piscataway New Jersey 08854, United States
Attn: Managing Director
ii
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Confidential
Version 2.1
14-Dec-2017
Specification for CSI-2
1.1
1.2
2.1
2.2
2.3
2.4
Contents
Figures .............................................................................................................................. vii
Tables ............................................................................................................................... xiv
Release History ............................................................................................................... xvi
1
Introduction .................................................................................................................1
Scope ............................................................................................................................... 1
Purpose ............................................................................................................................ 1
2 Terminology .................................................................................................................2
Use of Special Terms ....................................................................................................... 2
Definitions ....................................................................................................................... 2
Abbreviations ................................................................................................................... 3
Acronyms ......................................................................................................................... 3
3 References ....................................................................................................................5
4 Overview of CSI-2 .......................................................................................................7
5 CSI-2 Layer Definitions ..............................................................................................9
6 Camera Control Interface (CCI) ............................................................................. 11
CCI (I2C) Data Transfer Protocol .................................................................................. 12
6.1.1 CCI (I2C) Message Type ............................................................................................. 12
6.1.2 CCI (I2C) Read/Write Operations ............................................................................... 13
CCI (I3C) Data Transfer Protocol .................................................................................. 19
6.2.1 CCI (I3C SDR) Data Transfer Protocol ...................................................................... 19
6.2.2 CCI (I3C DDR) Data Transfer Protocol ..................................................................... 27
CCI (I3C) Error Detection and Recovery ...................................................................... 37
6.3.1 CCI (I3C SDR) Error Detection and Recovery Method ............................................. 37
6.3.2 CCI (I3C DDR) Error Detection and Recovery Method ............................................ 39
6.3.3 Error Detection and Recovery for CCI (I3C) Master Devices ................................... 45
CCI (I2C) Slave Addresses ............................................................................................. 45
CCI (I3C) Slave Addresses ............................................................................................ 45
CCI Multi-Byte Registers .............................................................................................. 46
6.6.1 Overview .................................................................................................................... 46
6.6.2 Transmission Byte Order for Multi-Byte Register Values .......................................... 48
6.6.3 Multi-Byte Register Protocol (Informative) ............................................................... 49
CCI I/O Electrical and Timing Specifications ............................................................... 53
7 Physical Layer ...........................................................................................................57
D-PHY Physical Layer Option ...................................................................................... 57
7.1.1 D-PHY v2.1 Compatibility with D-PHY v2.0 (Informative) ..................................... 58
C-PHY Physical Layer Option ....................................................................................... 58
8 Multi-Lane Distribution and Merging ....................................................................59
Lane Distribution for the D-PHY Physical Layer Option .............................................. 63
8.1
8.2
Lane Distribution for the C-PHY Physical Layer Option .............................................. 66
8.3 Multi-Lane Interoperability ........................................................................................... 68
8.3.1 C-PHY Lane De-Skew ............................................................................................... 70
6.4
6.5
6.6
7.1
7.2
6.7
6.1
6.2
6.3
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iii
Specification for CSI-2
Version 2.1
14-Dec-2017
9.6
9.7
9.8
9.9
9.10
9.11
9.11.1
9.11.2
9.11.3
9.1
9.2
9.3
9.4
9.5
9 Low Level Protocol ....................................................................................................71
Low Level Protocol Packet Format ............................................................................... 72
9.1.1 Low Level Protocol Long Packet Format ................................................................... 72
9.1.2 Low Level Protocol Short Packet Format .................................................................. 77
Data Identifier (DI) ........................................................................................................ 78
Virtual Channel Identifier .............................................................................................. 78
Data Type (DT) .............................................................................................................. 79
Packet Header Error Correction Code for D-PHY Physical Layer Option .................... 80
9.5.1 General Hamming Code Applied to Packet Header ................................................... 80
9.5.2 Hamming-Modified Code .......................................................................................... 81
9.5.3 ECC Generation on TX Side ...................................................................................... 85
9.5.4 Applying ECC on RX Side (Informative) .................................................................. 86
Checksum Generation .................................................................................................... 87
Packet Spacing ............................................................................................................... 90
Synchronization Short Packet Data Type Codes............................................................ 90
9.8.1 Frame Synchronization Packets.................................................................................. 91
9.8.2 Line Synchronization Packets .................................................................................... 91
Generic Short Packet Data Type Codes ......................................................................... 93
Packet Spacing Examples Using the Low Power State ................................................. 93
Latency Reduction and Transport Efficiency (LRTE) ................................................... 97
Interpacket Latency Reduction (ILR) ..................................................................... 97
Using ILR and Enhanced Transport Efficiency Together ..................................... 102
LRTE Register Tables ........................................................................................... 103
9.12 Data Scrambling .......................................................................................................... 105
CSI-2 Scrambling for D-PHY .............................................................................. 106
CSI-2 Scrambling for C-PHY............................................................................... 107
Scrambling Details ............................................................................................... 110
Packet Data Payload Size Rules .................................................................................. 114
9.13
9.14
Frame Format Examples .............................................................................................. 114
9.15 Data Interleaving ......................................................................................................... 118
9.15.1 Data Type Interleaving ......................................................................................... 118
9.15.2 Virtual Channel Identifier Interleaving ................................................................. 121
10 Color Spaces .........................................................................................................123
10.1 RGB Color Space Definition ....................................................................................... 123
10.2 YUV Color Space Definition ....................................................................................... 123
11 Data Formats ........................................................................................................125
11.1 Generic 8-bit Long Packet Data Types ........................................................................ 127
Null and Blanking Data ........................................................................................ 127
Embedded Information ......................................................................................... 127
Generic Long Packet Data Types 1 Through 4 ..................................................... 128
11.2 YUV Image Data ......................................................................................................... 129
Legacy YUV420 8-bit .......................................................................................... 129
YUV420 8-bit ....................................................................................................... 132
YUV420 10-bit ..................................................................................................... 136
YUV422 8-bit ....................................................................................................... 138
YUV422 10-bit ..................................................................................................... 140
11.2.1
11.2.2
11.2.3
11.2.4
11.2.5
9.12.1
9.12.2
9.12.3
11.1.1
11.1.2
11.1.3
iv
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Version 2.1
14-Dec-2017
Specification for CSI-2
11.3.1
11.3.2
11.3.3
11.3.4
11.3.5
11.4.1
11.4.2
11.4.3
11.4.4
11.4.5
11.4.6
11.4.7
11.4.8
11.3 RGB Image Data .......................................................................................................... 142
RGB888 ................................................................................................................ 143
RGB666 ................................................................................................................ 145
RGB565 ................................................................................................................ 147
RGB555 ................................................................................................................ 149
RGB444 ................................................................................................................ 150
11.4 RAW Image Data ......................................................................................................... 151
RAW6 ................................................................................................................... 152
RAW7 ................................................................................................................... 153
RAW8 ................................................................................................................... 154
RAW10 ................................................................................................................. 155
RAW12 ................................................................................................................. 157
RAW14 ................................................................................................................. 158
RAW16 ................................................................................................................. 160
RAW20 ................................................................................................................. 161
11.5 User Defined Data Formats ......................................................................................... 163
12 Recommended Memory Storage .........................................................................165
12.1 General/Arbitrary Data Reception ............................................................................... 165
12.2 RGB888 Data Reception ............................................................................................. 166
12.3 RGB666 Data Reception ............................................................................................. 166
12.4 RGB565 Data Reception ............................................................................................. 167
12.5 RGB555 Data Reception ............................................................................................. 167
12.6 RGB444 Data Reception ............................................................................................. 168
12.7 YUV422 8-bit Data Reception .................................................................................... 168
12.8 YUV422 10-bit Data Reception .................................................................................. 169
12.9 YUV420 8-bit (Legacy) Data Reception ..................................................................... 170
12.10 YUV420 8-bit Data Reception .................................................................................... 171
12.11 YUV420 10-bit Data Reception .................................................................................. 172
12.12 RAW6 Data Reception ................................................................................................. 173
12.13 RAW7 Data Reception ................................................................................................. 173
12.14 RAW8 Data Reception ................................................................................................. 174
12.15 RAW10 Data Reception ............................................................................................... 174
12.16 RAW12 Data Reception ............................................................................................... 175
12.17 RAW14 Data Reception ............................................................................................... 175
12.18 RAW16 Data Reception ............................................................................................... 176
12.19 RAW20 Data Reception ............................................................................................... 176
JPEG8 Data Format (informative) .........................................................177
Introduction.................................................................................................................. 177
JPEG Data Definition .................................................................................................. 178
Image Status Information ............................................................................................ 179
Embedded Images ........................................................................................................ 181
JPEG8 Non-standard Markers ..................................................................................... 182
JPEG8 Data Reception ................................................................................................ 182
CSI-2 Implementation Example (informative) .....................................183
Overview...................................................................................................................... 183
CSI-2 Transmitter Detailed Block Diagram ................................................................ 184
CSI-2 Receiver Detailed Block Diagram ..................................................................... 185
Annex A
A.1
A.2
A.3
A.4
A.5
A.6
B.1
B.2
B.3
Annex B
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v
Specification for CSI-2
Version 2.1
14-Dec-2017
B.4
E.2
E.3
H.1
Annex D
Annex E
E.1
C.1
C.2
C.3
C.4
D.1
D.2
D.3
D.4
B.4.1
B.4.2
B.4.3
B.4.4
Annex C
Details on the D-PHY Implementation ........................................................................ 186
CSI-2 Clock Lane Transmitter .............................................................................. 187
CSI-2 Clock Lane Receiver .................................................................................. 188
CSI-2 Data Lane Transmitter ................................................................................ 189
CSI-2 Data Lane Receiver .................................................................................... 191
CSI-2 Recommended Receiver Error Behavior (informative) ............193
Overview...................................................................................................................... 193
D-PHY Level Error ...................................................................................................... 194
Packet Level Error ....................................................................................................... 195
Protocol Decoding Level Error .................................................................................... 196
CSI-2 Sleep Mode (informative) .............................................................197
Overview...................................................................................................................... 197
SLM Command Phase ................................................................................................. 197
SLM Entry Phase ......................................................................................................... 198
SLM Exit Phase ........................................................................................................... 198
Data Compression for RAW Data Types (normative) ..........................199
Predictors ..................................................................................................................... 201
E.1.1 Predictor1 ................................................................................................................. 201
E.1.2 Predictor2 ................................................................................................................. 202
Encoders ...................................................................................................................... 203
E.2.1 Coder for 10–8–10 Data Compression ..................................................................... 203
E.2.2 Coder for 10–7–10 Data Compression ..................................................................... 205
E.2.3 Coder for 10–6–10 Data Compression ..................................................................... 208
E.2.4 Coder for 12-10-12 Data Compression .................................................................... 211
E.2.5 Coder for 12–8–12 Data Compression ..................................................................... 213
E.2.6 Coder for 12–7–12 Data Compression ..................................................................... 216
E.2.7 Coder for 12–6–12 Data Compression ..................................................................... 219
Decoders ...................................................................................................................... 222
E.3.1 Decoder for 10–8–10 Data Compression ................................................................. 222
E.3.2 Decoder for 10–7–10 Data Compression ................................................................. 225
E.3.3 Decoder for 10–6–10 Data Compression ................................................................. 228
E.3.4 Decoder for 12–10–12 Data Compression ............................................................... 231
E.3.5 Decoder for 12–8–12 Data Compression ................................................................. 234
E.3.6 Decoder for 12–7–12 Data Compression ................................................................. 237
E.3.7 Decoder for 12–6–12 Data Compression ................................................................. 241
Annex F JPEG Interleaving (informative) ...............................................................245
Annex G
Scrambler Seeds for Lanes 9 and Above ................................................249
Annex H Guidance on CSI-2 Over C-PHY ALP and PPI ....................................251
CSI-2 with C-PHY ALP Mode .................................................................................... 251
Concepts of ALP Mode and Legacy LP Mode ..................................................... 251
H.1.1
Burst Examples Using ALP Mode ........................................................................ 254
H.1.2
H.1.3
Transmission and Reception of ALP Commands Through the PPI ...................... 259
H.1.4 Multi-Lane Operation Using ALP Mode .............................................................. 265
Concurrent LP and ALP Operation ....................................................................... 267
H.1.5
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