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ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5773−3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative www.onsemi.com 2

Table of Contents Foreward Preface Chapter 1: Overview of Power Factor Correction Approaches Chapter 2: Methodology for Comparison of Active PFC Approaches Chapter 3: Critical Conduction Mode (CrM) PFC Chapter 4: Frequency Clamped Critical Conduction Mode (FCCrM) PFC Chapter 5: Continuous Conduction Mode (CCM) PFC Chapter 6: Interleaved PFC Chapter 7: Bridgeless PFC Chapter 8: Single Stage, Isolated Power Factor Correction Chapter 9: Detailed Analyses and Comparisons . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Page 5 7 9 27 31 45 59 71 85 97 107 For additional information on Power Factor Correction, contact the Technical Information Center at 800−282−9855 (from the USA and Canada) or www.onsemi.com/tech−support. www.onsemi.com 3

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FOREWORD Designing power supplies in a global energy efficiency context Designing power supplies has always been a challenging task. But just as many of the traditional problems have been solved, emerging regulatory standards governing efficiency levels are about to start the cycle over again. The first phase of this cycle is already well underway and has focused on improving standby power consumption levels (passive mode). The next phase is tackling the tougher problem of improving active mode efficiency levels. Government agencies around the world, driven by the US Environmental Protection Agency (EPA) and its ENERGY STAR® program and by the China National Institute of Standardization (CNIS), are announcing new performance standards for active mode efficiency for power supplies. The standards are aggressive and it will take the joint efforts of manufacturers and their suppliers (including semiconductor suppliers) to provide solutions that meet the new challenges. Amidst these trends, power factor correction (PFC) or harmonic reduction requirements as mandated by IEC 61000−3−2 stands out as the biggest inflection point in power supply architectures in recent years. With increasing power levels for all equipment and widening applicability of the harmonic reduction standards, more and more power supply designs are incorporating PFC capability. Designers are faced with the difficult tasks of incorporating the appropriate PFC stage while meeting the other regulatory requirements such as standby power reduction, active mode efficiency and EMI limits. ON Semiconductor is committed to providing optimal solutions for any given power supply requirement. Our commitment is reflected in providing design guidance in choosing between many options for topology and components. In this handbook we have attempted to provide a detailed comparison between various options for PFC implementation while keeping it in the context of total system requirements. As new technologies and components are developed, the balance of choice may shift from one approach to the other, but the methodology used in this handbook will remain applicable and provide a means for the power supply designer to arrive at the best choice for a given application. We at ON Semiconductor sincerely hope this book will help you to design efficient, economical PFC circuits for your products. Please see our Web site, www.onsemi.com, for up−to−date information on this subject. www.onsemi.com 5

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Preface Choices for the power factor correction solutions range from passive circuits to a variety of active circuits. Depending on the power level and other specifics of the application, the appropriate solution will differ. The advances in the discrete semiconductors in recent years, coupled with availability of lower priced control ICs have made the active PFC solutions more appropriate in a wider range of applications. When evaluating the PFC solutions, it is important to look at them in the context of full system implementation cost and performance. This handbook is an updated version of the first PFC handbook published by ON Semiconductor in 2003. This current version was updated with the assistance of Dhaval Dalal from Acptek (dhaval@acptek.com). In this handbook, a number of different PFC approaches are evaluated for a 300 W (400 V, 0.75 A) application. An overview of select single−stage isolated converters including an LED driver is also presented. By providing step-by-step design guidelines and system level comparisons, it is hoped that this effort will help the power electronics designers select the right approach for their application. Chapter 1 provides a comprehensive overview of PFC circuits and details of operation and design considerations for commonly used PFC circuits. Chapter 2 describes the methodology used for comparing different active PFC approaches for a given application (400 V, 0.75 A output). It also briefly introduces the proposed approaches. Chapter 3 contains the design guidelines, discussion and salient operational results for the two variations of the critical conduction mode topologies (voltage mode and current mode) Chapter 4 contains the design guidelines, discussion and salient operational results for the Frequency Clamped CrM topology Chapter 5 contains the design guidelines, discussion and salient operational results for the continuous conduction mode topology Chapter 6 contains the information on the interleaved PFC topology and salient operational results Chapter 7 contains the information on the bridgeless PFC approach and salient operational results Chapter 8 contains information on the single stage PFC operation and salient operational results Chapter 9 provides a detailed analysis of the results obtained from the three different implementations (CrM, FCCrM and CCM) for the same applications. Comparative analyses and rankings are provided for the topologies for given criteria. It also includes guidelines for the designers based on the results described in the previous chapters. http://onsemi.com 7

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