logo资料库

A New Golden Age for Computer Architecture 2018.pdf

发布时间：2022-05-29 发布人：admin 分类：说明书 资料大小：1.87M 资料格式：pdf 举报 版权申诉
第1页 / 共56页
第2页 / 共56页
第3页 / 共56页
第4页 / 共56页
第5页 / 共56页
第6页 / 共56页
第7页 / 共56页
第8页 / 共56页
资料共56页，剩余部分请下载后查看
    A New Golden Age for Computer Architecture: Domain-Specific Hardware/Software Co-Design, Enhanced Security, Open Instruction Sets, and Agile Chip Development
    Outline
    IBM Compatibility Problem in Early 1960s
    Control versus Datapath
    Microprogramming in IBM 360
    IC Technology, Microcode, and CISC
    Writable Control Store
    Microprocessor Evolution
    Analyzing Microcoded Machines 1980s
    From CISC to RISC
    Berkeley & Stanford RISC Chips
    “Iron Law” of Processor Performance: How RISC can win
    Video of RISC History*
    CISC vs. RISC Today
    VLIW: Very Long Instruction Word (Josh Fisher)
    From RISC to Intel/HP Itanium, EPIC IA-64
    VLIW Issues and an “EPIC Failure”
    Summary Part I: Consensus on ISAs Today
    Outline
    Fundamental Changes in Technology
    End of Growth of Single Program Speed?
    Moore’s Law in DRAMs
    Moore’s Law Slowdown in Intel Processors
    Technology & Power: Dennard Scaling
    Sorry State of Security
    Example of Current State of the Art: x86
    Spectre & Computer Architecture
    Part II: Challenges Summary
    Outline
    What Opportunities Left?
    What’s the Opportunity?
    Domain Specific Architectures (DSAs)
    Why DSAs Can Win (no magic) Tailor the Architecture to the Domain
    Domain Specific Languages
    Research Opportunities
    Deep learning is causing a machine learning revolution
    Tensor Processing Unit v1
    TPU: High-level Chip Architecture
    Perf/Watt TPU vs CPU & GPU
    Part III: DSL/DSA Summary
    Part III: Open Architectures
    RISC-V Origin Story
    What’s Different About RISC-V?
    RISC-V Base Plus Standard Extensions
    Foundation Members since 2015
    Foundation Working Groups (partial list)
    NVDLA: An Open DSA and Implementation
    Security and Open Architecture
    Part III: Open Architecture Summary
    Agile Hardware Development
    Reuse: Shared Lines of RTL Code (Chisel)
    Agile Hardware Dev. Methodology
    Four 28nm & Six 45nm RISC-V Chips taped out in 5 years
    Conclusion: A New Golden Age
    Questions?
    UC Berkeley CS Division Turing Award Projects 1970-90
    A New Golden Age for Computer Architecture: Domain-Specific Hardware/Software Co-Design, Enhanced Security, Open Instruction Sets, and Agile Chip Development John Hennessy and David Patterson Stanford and UC Berkeley 13 June 2018 https://www.youtube.com/watch?v=3LVeEjsn8Ts 1
    Outline Part II: Current Architecture Challenges - Ending of Dennard Scaling and Moore’s Law, Security Part I: History of Architecture - Mainframes, Minicomputers, Microprocessors, RISC vs CISC, VLIW Part III: Future Architecture Opportunities - Domain Specific Languages and Architecture, Open Architectures, Agile Hardware Development 2
    IBM Compatibility Problem in Early 1960s 7094 7074 7080 7010 By early 1960’s, IBM had 4 incompatible lines of computers! ➡ 701 ➡ 650 ➡ 702 1401 ➡ Each system had its own: Instruction set architecture (ISA) ▪ I/O system and Secondary Storage: ▪ magnetic tapes, drums and disks ▪ Assemblers, compilers, libraries,... ▪ Market niche: business, scientific, real time, ... IBM System/360 – one ISA to rule them all 3
    Control versus Datapath ▪ Processor designs split between datapath, where numbers are stored and arithmetic operations computed, and control, which sequences operations on datapath ▪ Biggest challenge for computer designers was getting control correct Control h t a p a t a D C P . g e R . t s n I s r e t s i g e R Instruction Condition? Control Lines ▪ Maurice Wilkes invented the idea of microprogramming to design the control unit of a processor* ▪ Logic expensive vs. ROM or RAM ▪ ROM cheaper than RAM ▪ ROM much faster than RAM * "Micro-programming and the design of the control circuits in an electronic digital computer," M. Wilkes, and J. Stringer. Mathematical Proc. of the Cambridge Philosophical Society, Vol. 49, 1953. Main Memory U L A Data Busy? Address 4
    Microprogramming in IBM 360 Model Datapath width Microcode size Clock cycle time (ROM) Main memory cycle time Price (1964 $) Price (2018 $) M30 8 bits 4k x 50 750 ns 1500 ns $192,000 $1,560,000 M40 16 bits 4k x 52 625 ns 2500 ns $216,000 $1,760,000 M50 32 bits 2.75k x 85 500 ns 2000 ns $460,000 $3,720,000 M65 64 bits 2.75k x 87 200 ns 750 ns $1,080,000 $8,720,000 Fred Brooks, Jr. 5
    IC Technology, Microcode, and CISC ▪ Logic, RAM, ROM all implemented using same transistors ▪ Semiconductor RAM ≈ same speed as ROM ▪ With Moore’s Law, memory for control store could grow ▪ Since RAM, easier to fix microcode bugs ▪Allowed more complicated ISAs (CISC) ▪ Minicomputer (TTL server) example: -Digital Equipment Corp. (DEC) -VAX ISA in 1977 ▪ 5K x 96b microcode 6
    Writable Control Store ▪ If Control Store is RAM, then could tailor “firmware” to application: “Writable Control Store” ▪ Microprogramming became popular in academia - Patterson PhD thesis* - SIGMICRO was for microprogramming** ▪ Xerox Alto (Bit Slice TTL) in 1973 -1st computer with Graphical User Interface & Ethernet -BitBlt and Ethernet controller in microcode * Verification of microprograms, David Patterson, UCLA, 1976 ** “The design of a system for the synthesis of correct microprograms,” David Patterson, Proc. 8th Annual Workshop of Microprogramming, 1975 Chuck Thacker 7
    Microprocessor Evolution ▪ Rapid progress in 1970s, fueled by advances in MOS technology, ▪ ▪ ▪ imitated minicomputers and mainframe ISAs “Microprocessor Wars”: compete by adding instructions (easy for microcode), justified given assembly language programming Intel iAPX 432: Most ambitious 1970s micro, started in 1975 ▪ 32-bit capability-based object-oriented architecture, custom OS written in Ada ▪ Severe performance, complexity (multiple chips), and usability problems; announced 1981 Intel 8086 (1978, 8MHz, 29,000 transistors) “Stopgap” 16-bit processor, 52 weeks to new chip ▪ ISA architected in 3 weeks (10 person weeks) assembly-compatible with 8 bit 8080 ▪ IBM PC 1981 picks Intel 8088 for 8-bit bus (and Motorola 68000 was late) ▪ ▪ Estimated PC sales: 250,000 ▪ Actual PC sales: 100,000,000 ⇒ 8086 “overnight” success ▪ Binary compatibility of PC software ⇒ bright future for 8086 8
    分享到：
    赞 收藏

    相关推荐

    资料库

    开发技术

    共收录19306份资料，累计14个分类，关注成员有19位，主要包括：Actionscript,Javascript,PHP,VB,Perl,Delphi,Python,C#,C,Java,C++,Web开发,硬件开发,其它

    热门标签

    Actionscript Javascript PHP VB Perl Delphi Python C# C Java C++ Web开发 硬件开发 其它

    最新资料