IEEE 1685-2009 (IP-XACT 2009).pdf

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IEEE Std 1685-2009 Front cover

Title page

Acknowledgment

Abstract/Keywords

Introduction

Notice to users

Laws and regulations

Copyrights

Updating of IEEE documents

Errata

Interpretations

Patents

Participants

Contents

Important notice

1. Overview

1.1 Scope

1.2 Purpose

1.3 Design environment

1.4 IP-XACT Enabled implementations

1.5 Conventions used

1.6 Use of color in this standard

1.7 Contents of this standard

2. Normative references

3. Definitions, acronyms, and abbreviations

3.1 Definitions

3.2 Acronyms and abbreviations

4. Interoperability use model

4.1 Roles and responsibilities

4.2 IP-XACT IP exchange flows

5. Interface definition descriptions

5.1 Definition descriptions

5.2 Bus definition

5.3 Abstraction definition

5.4 Ports

5.5 Wire ports

5.6 Qualifiers

5.7 Wire port group

5.8 Wire port mode constraints

5.9 Wire port mirrored-mode constraints

5.10 Transactional ports

5.11 Transactional port group

5.12 Extending bus and abstraction definitions

5.13 Clock and reset handling

6. Component descriptions

6.1 Component

6.2 Interfaces

6.3 Interface interconnections

6.4 Complex interface interconnections

6.5 Bus interfaces

6.6 Component channels

6.7 Address spaces

6.8 Memory maps

6.9 Remapping

6.10 Registers

6.11 Models

6.12 Component generators

6.13 File sets

6.14 Choices

6.15 White box elements

6.16 White box element reference

6.17 CPUs

7. Design descriptions

7.1 Design

7.2 Design component instances

7.3 Design interconnections

7.4 Active, monitored, and monitor interfaces

7.5 Design ad hoc connections

7.6 Design hierarchical connections

8. Abstractor descriptions

8.1 Abstractor

8.2 Abstractor interfaces

8.3 Abstractor models

8.4 Abstractor views

8.5 Abstractor ports

8.6 Abstractor wire ports

8.7 Abstractor generators

9. Generator chain descriptions

9.1 generatorChain

9.2 generatorChainSelector

9.3 generatorChain component selector

9.4 generatorChain generator

10. Design configuration descriptions

10.1 Design configuration

10.2 designConfiguration

10.3 generatorChainConfiguration

10.4 interconnectionConfiguration

11. Addressing and data visibility

11.1 Calculating the bit address of a bit in a memory map

11.2 Calculating the bus address at the slave bus interface

11.3 Address modifications of an interconnection

11.4 Address modifications of a channel

11.5 Addressing in the master

11.6 Visibility of bits

11.7 Address translation in a bridge

Annex A (informative) Bibliography

Annex B (normative) Semantic consistency rules

Annex C (normative) Common elements and concepts

Annex D (normative) Types

Annex E (normative) Dependency XPATH

Annex F (informative) External bus with an internal/digital interface

Annex G (normative) Tight generator interface

Annex H (informative) Bridges and channels

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Authorized licensed use limited to: Ryerson University Library. Downloaded on October 18,2016 at 11:55:33 UTC from IEEE Xplore. Restrictions apply.

IEEE Std 1685TM-2009 IEEE Standard for IP-XACT, Standard Structure for Packaging, Integrating, and Reusing IP within Tool Flows Sponsor Design Automation Standards Committee of the IEEE Computer Society and the IEEE Standards Association Corporate Advisory Group Approved 9 December 2009 IEEE SA-Standards Board Authorized licensed use limited to: Ryerson University Library. Downloaded on October 18,2016 at 11:55:33 UTC from IEEE Xplore. Restrictions apply.

Grateful acknowledgment is made to The SPIRIT Consortium, Inc., for permission to use the following source material: IP-XACT 1.2 and IP-XACT 1.5 Abstract: Conformance checks for eXtensible Markup Language (XML) data designed to describe electronic systems are formulated by this standard. The meta-data forms that are standardized include: components, systems, bus interfaces and connections, abstractions of those buses, and details of the components including address maps, register and field descriptions, and file set descriptions for use in automating design, verification, documentation, and use flows for electronic systems. A set of XML schemas of the form described by the World Wide Web Consortium (W3C®) and a set of semantic consistency rules (SCRs) are included. A generator interface that is portable across tool environments is provided. The specified combination of methodology-independent meta-data and the tool-independent mechanism for accessing that data provides for portability of design data, design methodologies, and environment implementations. Keywords: abstraction definitions, address space specification, bus definitions, design environment, EDA, electronic design automation, electronic system level, ESL, implementation constraints, IP-XACT, register transfer level, RTL, SCRs, semantic consistency rules, TGI, tight generator interface, tool and data interoperability, use models, XML design meta-data, XML schema The Institute of Electrical and Electronics Engineers, Inc. 3 Park Avenue, New York, NY 10016-5997, USA Copyright © 2010 by the Institute of Electrical and Electronics Engineers, Inc. All rights reserved. Published 18 February 2010. Printed in the United States of America. IEEE is a registered trademark in the U.S. Patent & Trademark Office, owned by the Institute of Electrical and Electronics Engineers, Incorporated. AMBA is a registered trademark of ARM Limited. Design Compiler and VCS are registered trademarks of Synopsys, Inc. SystemC is a registered trademarks of Open SystemC Initiative, Inc. in the United States and other countries. Verilog is a registered trademark of Cadence Design Systems, Inc. in the United States and/or other jurisdictions. W3C is a registered trademark of the World Wide Web Consortium. XMLSpy is a registered trademark of Altova GmbH in the U.S., the European Union and/or other countries. PDF: Print: ISBN 978-0-7381-6159-4 ISBN 978-0-7381-6160-0 STD96015 STDPD96015 IEEE prohibits discrimination, harassment and bullying. For more information, visit http://www.ieee.org/web/aboutus/whatis/policies/p9-26.html. No part of this publication may be reproduced in any form, in an electronic retrieval system or otherwise, without the prior written permission of the publisher. Authorized licensed use limited to: Ryerson University Library. Downloaded on October 18,2016 at 11:55:33 UTC from IEEE Xplore. Restrictions apply.

IEEE Standards documents are developed within the IEEE Societies and the Standards Coordinating Committees of the IEEE Standards Association (IEEE-SA) Standards Board. The IEEE develops its standards through a consensus development process, approved by the American National Standards Institute, which brings together volunteers representing varied viewpoints and interests to achieve the final product. Volunteers are not necessarily members of the Institute and serve without compensation. While the IEEE administers the process and establishes rules to promote fairness in the consensus development process, the IEEE does not independently evaluate, test, or verify the accuracy of any of the information or the soundness of any judgments contained in its standards. Use of an IEEE Standard is wholly voluntary. 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Furthermore, the viewpoint expressed at the time a standard is approved and issued is subject to change brought about through developments in the state of the art and comments received from users of the standard. Every IEEE Standard is subjected to review at least every five years for revision or reaffirmation, or every ten years for stabilization. When a document is more than five years old and has not been reaffirmed, or more than ten years old and has not been stabilized, it is reasonable to conclude that its contents, although still of some value, do not wholly reflect the present state of the art. Users are cautioned to check to determine that they have the latest edition of any IEEE Standard. In publishing and making this document available, the IEEE is not suggesting or rendering professional or other services for, or on behalf of, any person or entity. Nor is the IEEE undertaking to perform any duty owed by any other person or entity to another. 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Introduction This introduction is not part of IEEE Std 1685-2009, IEEE Standard for IP-XACT, Standard Structure for Packaging, Integrating, and Reusing IP within Tool Flows. The purpose of this standard is to provide the electronic design automation (EDA), semiconductor, electronic design intellectual property (IP) provider, and system design communities with a well-defined and unified specification for the meta-data that represents the components and designs within an electronic system. The goal of this specification is to enable delivery of compatible IP descriptions from multiple IP vendors; better enable importing and exporting complex IP bundles to, from, and between EDA tools for system on chip (SoC) design environments (DEs); better express configurable IP by using IP meta-data; and better enable provision of EDA vendor-neutral IP creation and configuration scripts (generators). The data and data access specification is designed to coexist and enhance the hardware description languages (HDLs) presently used by designers while providing capabilities lacking in those languages. The SPIRIT Consortium is a consortium of electronic system, IP provider, semiconductor, and EDA companies. IP-XACT enables a productivity boost in design, transfer, validation, documentation, and use of electronic IP and covers components, designs, interfaces, and details thereof. The data specified by IP- XACT is extensible in locations specified in the schema. IP-XACT enables the use of a unified structure for the meta specification of a design, components, interfaces, documentation, and interconnection of components. This structure can be used as the basis of both manual and automatic methodologies. IP-XACT specifies the tight generator interface (TGI) for access to the data in a vendor-independent manner. This standardization project provides electronic design engineers with a well-defined standard that meets their requirements in structured design and validation, and enables a step function increase in their productivity. This standardization project will also provide the EDA industry with a standard to which they can adhere and that they can support in order to deliver their solutions in this area. The SPIRIT Consortium has prepared a set of bus and abstraction definitions for several common buses. It is expected, over time, that those standards groups and manufacturers who define buses will include IP-XACT eXtensible Markup Language (XML) bus and abstraction definitions in their set of deliverables. Until that time, and to cover existing useful buses, a set of bus and abstraction definitions for common buses has been created. A set of reference bus and abstraction definitions allows many vendors who define IP using these buses to easily interconnect IP together. The SPIRIT Consortium posts these for use by its members, with no warranty of suitability, but in the hope that these will be useful. The SPIRIT Consortium will, from time-to- time, update these files and if a Standards body wishes to take over the work of definition, will transfer that work to that body. These reference bus and abstraction definition templates (with comments and examples) are available from the public area of The SPIRIT Consortium Web site.a aAvailable at http://www.spiritconsortium.org. iv Copyright © 2010 IEEE. All rights reserved. Authorized licensed use limited to: Ryerson University Library. Downloaded on October 18,2016 at 11:55:33 UTC from IEEE Xplore. Restrictions apply.

Notice to users Laws and regulations Users of these documents should consult all applicable laws and regulations. Compliance with the provisions of this standard does not imply compliance to any applicable regulatory requirements. Implementers of the standard are responsible for observing or referring to the applicable regulatory requirements. IEEE does not, by the publication of its standards, intend to urge action that is not in compliance with applicable laws, and these documents may not be construed as doing so. Copyrights This document is copyrighted by the IEEE. It is made available for a wide variety of both public and private uses. These include both use, by reference, in laws and regulations, and use in private self-regulation, standardization, and the promotion of engineering practices and methods. By making this document available for use and adoption by public authorities and private users, the IEEE does not waive any rights in copyright to this document. Updating of IEEE documents Users of IEEE standards should be aware that these documents may be superseded at any time by the issuance of new editions or may be amended from time to time through the issuance of amendments, corrigenda, or errata. An official IEEE document at any point in time consists of the current edition of the document together with any amendments, corrigenda, or errata then in effect. In order to determine whether a given document is the current edition and whether it has been amended through the issuance of amendments, corrigenda, or errata, visit the IEEE Standards Association website at http:// ieeexplore.ieee.org/xpl/standards.jsp, or contact the IEEE at the address listed previously. For more information about the IEEE Standards Association or the IEEE standards development process, visit the IEEE-SA website at http://standards.ieee.org. Errata Errata, if any, for this and all other standards can be accessed at the following URL: http:// standards.ieee.org/reading/ieee/updates/errata/index.html. Users are encouraged to check this URL for errata periodically. Interpretations Current interpretations can be accessed at the following URL: http://standards.ieee.org/reading/ieee/interp/ index.html. Patents Attention is called to the possibility that implementation of this standard may require use of subject matter covered by patent rights. By publication of this standard, no position is taken with respect to the existence or validity of any patent rights in connection therewith. The IEEE shall not be responsible for identifying patents or patent applications for which a license may be required to implement an IEEE standard or for conducting inquiries into the legal validity or scope of those patents that are brought to its attention. Copyright © 2010 IEEE. All rights reserved. v Authorized licensed use limited to: Ryerson University Library. Downloaded on October 18,2016 at 11:55:33 UTC from IEEE Xplore. Restrictions apply.

Participants The SPIRIT Standardization Working Group is entity based. At the time this standard was submitted to the IEEE-SA Standards Board for approval, the SPIRIT Standardization Working Group had the following membership: Greg Ehmann, Chair Kathy Werner, Vice Chair Joe Daniels, Technical Editor Mark Gogolewski Serge Hustin Prabhu Krishnamurthy Stan Krolikoski Mark Noll John Swanson Yatin Trivedi Ralph von Vignau Richard Weber Victor Berman Dennis Brophy Bill Chown Gary Delp Jean-Michel Fernandez The following members of the entity balloting committee voted on this standard. Balloters may have voted for approval, disapproval, or abstention. Accellera Organization Inc. Cadence Design Systems Inc. Freescale Semiconductor Inc. NXP Semiconductors STMicroelectronics Semifore, Inc. The SPIRIT Consortium Synopsys, Inc. Texas Instruments Inc. vi Copyright © 2010 IEEE. All rights reserved. Authorized licensed use limited to: Ryerson University Library. Downloaded on October 18,2016 at 11:55:33 UTC from IEEE Xplore. Restrictions apply.

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