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ANSI-VITA 46.7 Ethernet on VPX Fabric Connector.pdf

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1 VITA PO Box 19658, Fountain Hills, AZ 85269 PH: 480-837-7486 Email: info@vita.com Approved American National Standard ANSI/VITA 46.7 Ethernet on VPX Fabric Connector Abstract The objectives of this standard are to assign backplane Ethernet links to the VPX P1/J1 connector and to provide rules and recommendations for the use of Ethernet over backplane media. Approved March 2012 American National Standards Institute, Inc.
American National Standard Approval of an American National Standard requires verification by ANSI that the requirements for due process, consensus, and other criteria for approval have been met by the standards developer. Consensus is established when, in the judgment of the ANSI Board of Standards Review, substantial agreement has been reached by directly and materially affected interests. Substantial agreement means much more than a simple majority, but not necessarily unanimity. Consensus requires that all views and objections be considered, and that a concerted effort be made toward their resolution. The use of American National Standards is completely voluntary; their existence does not in any respect preclude anyone, whether he has approved the standards or not, from manufacturing, marketing, purchasing, or using products, processes, or procedures not conforming to the standards. The American National Standards Institute does not develop standards and will in no circumstances give an interpretation of any American National Standard. Moreover, no person shall have the right or authority to issue an interpretation of an American National Standard in the name of the American National Standard Institute. Requests for interpretations should be addressed to the secretariat or sponsor whose name appears on the title page of this standard. CAUTION NOTICE: This American National Standard may be revised or withdrawn at any time. The procedures of the American National Standards Institute require that action be taken periodically to reaffirm, revise, or withdraw this standard. Purchases of American National Standards may receive current information on all standard by calling or writing the American National Standards Institute. Published by VMEbus International Trade Association (VITA) PO Box 19658, Fountain Hills, AZ 85269 Copyright © 2012 by VMEbus International Trade Association All rights reserved. Permission of the publisher is required to reproduce this document or any part of it. Printed in the United States of America - R1.0 ISBN 1-885731-70-1
ANSI/VITA 46.7 Table of Contents Introduction ........................................................................................................... 7   1   Ethernet Technology Overview ........................................................................... 8   1.1   1.2   Objective ................................................................................................................ 9   1.3   Terminology ........................................................................................................ 10   1.3.1   Specification Key Words .................................................................................... 10   1.3.2   Glossary ............................................................................................................... 12   1.4   References ............................................................................................................ 17   VITA 46.7 Compliance ....................................................................................... 18   2   3U Plug-in module Minimum Requirements ................................................... 19   2.1   2.2   6U Plug-in module Minimum Requirements ................................................... 19   Backplane Minimum Requirements ................................................................. 19   2.3   Plug-in modules ................................................................................................... 20   3   4   Backplane Requirements .................................................................................... 23   Electrical .............................................................................................................. 26   5   6   Nomenclature ...................................................................................................... 27   Copyright 2012 VITA Page 3 of 27
ANSI/VITA 46.7 Tables Table 1: Glossary .............................................................................................................. 12   Table 2: Plug-in module P1 Connector Pin Assignments ................................................ 21   Table 3: Plug-in module P1 Connector Signal Definitions ............................................. 21   Table 4: P1 Connector Port/Link Assignments ............................................................... 22   Table 5: Backplane Slot J1 Connector Pin Assignments ................................................. 24   Table 6: Backplane J1 Signal Definitions ........................................................................ 25   Table 7: VITA 46.7 Port Capability Nomenclature ......................................................... 27   Copyright 2012 VITA Page 4 of 27
ANSI/VITA 46.7 Working Group At the time this standard was completed, working group membership included: Name Grant Bechthold Lori Bechtold Steve Cecil James Demers David Dix Doug Endo Robert Evans Bob Ford Fred Fons Jim Goldenberg H. Scott Goedeke Claus Gross Val Georgiev Mike Gust Ian Hames Bill Hanna Rex Harvey Melissa Heckman Eric Hickey Richard Hodges Dean Holman Ben Jeffrey Pete Jha Steve Konsowski Andreas Lenkisch Paul Mesibov Michael Munroe Robert Normoyle Company Allen-Vanguard Boeing NSWC Crane Hypertronics Amphenol Raytheon Meritec Boeing Foxconn GE Northrop Grumman PCI Systems Mercury CWCEC Boeing Parker Elma/Bustronic Amphenol Parker Mercury Molex CWCEC Northrop Grumman Pentair Pentek Bustronic Corp. DRS Copyright 2012 VITA Page 5 of 27
ANSI/VITA 46.7 Bob Patterson David Pepper Greg Powers Andy Reddig Greg Rocco Mac Rush John Rynearson Brian Sanderson Pat Shaw John Streyle Andrew Stringer Ivan Straznicky Bob Sullivan Bruce Thomas Kevin Thorson Serge Tissot Dan Toohey Keith Vieira Ben Winder Tyco GE Tyco TekMicro Mercury Emerson VITA CWCEC GD-Canada GE Aviation Lockheed Martin CWCEC CWCES CWCEC Lockheed Martin Kontron Mercury Carlo Gavazzi CWCEC Comments, Corrections, or Additions Anyone wishing to provide comments, corrections, and/or additions to this standard should contact the VITA technical director at techdir@vita.com. VSO and Other Standards Information on other standards being developed by the VSO, VME Product Directories, VME Handbooks, and general information on the VME and VPX market is available from the VITA office at the address and telephone number listed on the front cover of this document. Trademarks Trademarks in this standard are the property of their respective owners. Copyright 2012 VITA Page 6 of 27
Introduction ANSI/VITA 46.7 1 The embedded computing industry serves markets tending to need data plane interconnect technologies that push the state-of-the-art. One method of achieving high performance is to implement switched serial fabric technologies. VPX provides a means to implement switched serial technologies in a manner enabling implementers to tailor their architecture with the appropriate fabric for their application. The benefits of switched serial interconnect technologies over parallel multi-drop buses include but are not limited to: • Higher transaction bandwidth • Higher aggregate bandwidth • Lower link latency • Less contention for the interconnect medium • • Less routing real estate consumed Increased scalability The VPX base standard (VITA 46.0) defines physical features of VPX components. “Dot” standards further define additional sets of protocol layer standards that define specific serial or parallel interconnects used in a system implementation. VITA 46.7 defines the mapping of Ethernet signals to the VPX allocated fabric space mapped across the backplane on the P1/J1 connector for payload modules. It does not address switch slot pin assignments. Ethernet variants abound. As defined by IEEE 802.3, it includes many implementations differentiated in numerous ways, but primarily by media of transmission. For the VPX switched serial fabric implementation, the media is a backplane. Consequently, VITA 46.7 confines the specific Ethernet implementation to operation over electrical backplanes. The first IEEE 802.3 definition of Ethernet over backplane media occurred in revision 802.3ap. Subsequently, this revision has been included in IEEE 802.3-2008. Prior to the release of revision 802.3ap, the only standard defining Ethernet over a backplane was the PICMG 3.1 specification “Ethernet/Fibre Channel for AdvancedTCA™ Systems” published by the Peripheral Component Interconnect (PCI) Industrial Computers Manufacturers Group (PICMG). A considerable supply base exists supporting PICMG 3.1 in comparison to IEEE 802.3ap backplane Ethernet. Therefore, to take advantage of this supply base, and to ease the transition to IEEE standard backplane Ethernet, VITA 46.7 also supports PICMG 3.1 implementations. These include PICMG 3.1 only as well as a mix of IEEE and PICMG compliant ports. For mixed cases, VITA 46.7 provides guidance for interoperability. Copyright 2012 VITA Page 7 of 27
ANSI/VITA 46.7 1.1 Ethernet Technology Overview The ubiquitous Ethernet computer networking protocol was invented in 1972 and standardized as IEEE 802.3 in 1982. The original standard and subsequent updates specified Ethernet protocol over cables up until the release of IEEE 802.3-2008 which defined Ethernet over a backplane. An Ethernet network may be constructed in several different ways within the confines of the IEEE 802.3 standard. The choice of specific architectures is beyond the scope of this standard. The Ethernet Fat Pipe consists of four transmit and four receive serial differential signal pairs. Each transmit and receive pair is also known as a logical lane. Therefore, the Fat Pipe is a four lane (x4 logical lane) physical interface. This is the configuration defined for 10GBASE-KX4 in IEEE 802.3-2008 Clause 71. The same configuration is used for XAUI defined by Clause 47 and 10GBASE-BX4 defined by PICMG 3.1. The PICMG specification borrows significant content from XAUI to define the electrical requirements. The most ubiquitous Ethernet version to date, 1000BASE-T, uses a Thin Pipe consisting of four bi-directional serial differential signal pairs instead of eight uni-directional pairs as in KX4 and BX4. It encodes information using four level pulse-amplitude modulation (PAM5) instead of a binary bitstream. 1000BASE-T is defined by IEEE 802.3-2005 Clause 40 and the 10 Gbps version, 10GBASE-T, is defined by IEEE 802.3an-2006 Clause 55. 1000BASE-T and 10GBASE-T implementations are intended for cable media. Although backplane channels could be designed to reliably carry them, there are no industry standards defining their use in backplanes. Therefore, VITA 46.7 does not include 1000BASE-T or 10GBASE-T. Another type of Thin Pipe for Ethernet is reduced XAUI, known as RXAUI. It was originated by Dune Networks, now part of Broadcom. RXAUI consists of four uni- directional serial differential signal pairs; two transmit and two receive. It uses OIF CEI- 6G-SR which defines the interface as 6.25 Gbps over up to 20 cm of printed circuit board and one connector. This is unsuitable for a VPX backplane which could be as long 50 cm and have two connectors. Therefore, it was not included in VITA 46.7. The Ultra-thin Pipe consists of one transmit and one receive serial differential signal pair (1x logical lane) over printed circuit board. This is the configuration defined for 1000BASE-KX in IEEE 802.3-2008 Clause 70 and 1000BASE-BX in PICMG 3.1. Another type of Ultra Thin Pipe for Ethernet is 1000BASE-CX defined by IEEE 802.3- 2005 Clause 39. However, it is defined for InfiniBand® twin-axial cable, not backplanes, so it is not suitable for VITA 46.7. Copyright 2012 VITA Page 8 of 27
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