General description
Ordering information
QCC3026 WLCSP Development Kit ordering information
QTIL contacts
Device details
QCC3026 WLCSP functional block diagram
Revision history
Status information
Device implementation
Life support policy and use in safety-critical applications
QTIL environmental and RoHS compliance
Contents
Tables
Figures
1 Package information
1.1 QCC3026 WLCSP package dimensions diagram
1.2 QCC3026 WLCSP pin allocations
1.3 QCC3026 WLCSP device terminal functions
1.3.1 QCC3026 WLCSP device terminal functions (Radio)
1.3.2 QCC3026 WLCSP device terminal functions (Clock)
1.3.3 QCC3026 WLCSP device terminal functions (USB)
1.3.4 QCC3026 WLCSP device terminal functions (QSPI)
1.3.5 QCC3026 WLCSP device terminal functions (PIO)
1.3.6 QCC3026 WLCSP device terminal functions (Audio)
1.3.7 QCC3026 WLCSP device terminal functions (AIO/LED drivers)
1.3.8 QCC3026 WLCSP device terminal functions (SMPS)
1.3.9 QCC3026 WLCSP device terminal functions (Power supplies and control)
1.3.10 QCC3026 WLCSP device terminal functions (Ground)
1.3.11 QCC3026 WLCSP device terminal functions (Not connected)
1.4 QCC3026 WLCSP PCB design and assembly considerations
1.4.1 Typical solder reflow profile
1.5 Moisture sensitivity level
2 Bluetooth subsystem
2.1 Bluetooth v5.0
2.2 Bluetooth radio
2.2.1 Receiver
2.2.2 Transmitter
3 Crystal oscillator
3.1 Crystal specification
4 System power states
4.1 No Power state
4.2 Active state
4.3 Shallow Sleep state
4.4 Deep Sleep state
4.5 Dormant state
4.6 Off state
4.7 Transition between static power states
4.8 Power islands
5 Host Interfaces subsystem
5.1 Host Interfaces subsystem features
6 Applications subsystem
6.1 Application subsystem features
7 Audio subsystem
7.1 Audio subsystem features
7.2 Kalimba core
7.3 Program ROM
7.4 Program RAM and caches
7.5 Data RAM
7.6 Buffer Access Controller
7.7 Audio engine
8 Audio interfaces
8.1 Analog audio interfaces
8.1.1 Line/Mic inputs
8.1.2 Line/Headphone output
8.2 Digital audio interfaces
8.2.1 Digital microphone inputs
8.2.2 Standard I²S/PCM interface (Input only)
8.2.3 I²S/PCM master mode timing diagram
8.2.4 I²S/PCM slave mode timing diagram
8.3 Simultaneous audio routing
8.3.1 Codec inputs
8.3.2 Codec output
8.3.3 Audio slots
9 Peripheral interfaces
9.1 PIO
9.2 PIO pad allocation
9.3 Standard I/O
9.4 Pad multiplexing
9.5 RESET# reset pin
9.6 SYS_CTRL pin
9.7 LED pads
9.8 LED controllers
9.9 USB interface
9.10 USB device port
9.11 USB charger detection
10 Transaction bridge
11 Boot Manager
11.1 OTP memory
12 System Manager
12.1 System timer
13 PMU subsystem
13.1 Li-ion charger
13.2 General charger operation
13.2.1 Battery protection
13.2.2 Temperature measurement during charging
13.3 Charging modes
13.4 Power regulation
13.4.1 Switch mode regulators
13.4.2 Bypass LDO regulator
13.4.3 KA regulator
14 QCC3026 WLCSP example application schematic
15 Electrical characteristics
15.1 Absolute maximum ratings
15.2 Recommended operating conditions
15.3 Battery input pin specification
15.4 Charger input pin specification
15.5 Battery charger
15.6 Regulator enable
15.7 Bypass LDO
15.8 1.8 V SMPS
15.9 Digital SMPS
15.10 10‑bit auxiliary ADC
15.11 Digital terminals
15.12 LED driver pads
15.13 ESD protection
16 Audio performance
16.1 Digital-to-analog converter
16.1.1 Class-D DAC audio output
16.2 Analog-to-digital converters
16.2.1 High-quality (HQADC) single-ended audio input
16.2.2 High-quality (HQADC) differential audio input
16.3 Microphone bias
17 Bluetooth performance
18 Power consumption
19 Environmental declaration statement for QTIL semiconductor products
20 Software development and tools
20.1 Qualcomm® MultiCore Development Environment
20.2 Audio Development Kit
Document references
Glossary