88E1112手册.pdf

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Section 1. Signal Description

1.1 88E1112 64-Pin QFN Package

1.2 Pin Description

1.2.1 Pin Type Definitions

1.3 64-Pin QFN Pin Assignment List - Alphabetical by Signal Name

Section 2. Functional Specifications

2.1 Data Interfaces

2.1.1 MAC Interface

2.1.1.1 SGMII MAC Interface

2.1.1.2 GBIC/SFP Interface

2.1.1.3 Media Converter MAC Interface

2.1.2 Fiber Interface

2.2 88E1112 Device Modes of Operation

2.2.1 SGMII MAC Interface to Auto Media Detect 10BASE-T/ 100BASE-TX/1000BASE-T/1000BASE-X

2.2.2 SGMII MAC Interface to Auto Media Detect 10BASE-T/ 100BASE-TX/1000BASE-T/SGMII Media Interface

2.2.3 GBIC to 1000BASE-T

2.2.4 SGMII MAC Interface to 100BASE-FX

2.3 Loopback

2.3.1 MAC Interface Loopback

2.3.2 Copper Interface Loopback

2.3.3 Fiber Interface Loopback

2.3.4 External Loopback

2.3.4.1 Copper Media

2.3.4.2 Fiber Media

2.4 Hardware Configuration

2.5 Copper Media Transmit and Receive Function

2.5.1 Transmit Side Network Interface

2.5.1.1 Multi-mode TX Digital to Analog Converter

2.5.1.2 Slew Rate Control and Waveshaping

2.5.2 Encoder

2.5.2.1 1000BASE-T

2.5.2.2 100BASE-TX

2.5.2.3 10BASE-T

2.5.3 Receive Side Network Interface

2.5.3.1 Analog to Digital Converter

2.5.3.2 Active Hybrid

2.5.3.3 Echo Canceller

2.5.3.4 NEXT Canceller

2.5.3.5 Baseline Wander Canceller

2.5.3.6 Digital Adaptive Equalizer

2.5.3.7 Digital Phase Lock Loop

2.5.3.8 Link Monitor

2.5.3.9 Signal Detection

2.5.4 Decoder

2.5.4.1 1000BASE-T

2.5.4.2 100BASE-TX

2.5.4.3 10BASE-T

2.6 Power Supplies

2.6.1 VDDA, VDDAH

2.6.2 VDDAL

2.6.3 F_VTT and S_VTT

2.6.4 DVDD

2.6.5 VDDO

2.6.6 Power Supply Sequencing

2.7 Power Management

2.7.1 Low Power Modes

2.7.2 Low Power Operating Modes

2.7.2.1 IEEE Power Down Mode

2.7.2.2 Energy Detect Power Down Modes

2.7.2.3 Normal 10/100/1000 Mbps Operation

2.7.3 SGMII MAC Interface Effect on Low Power Modes

2.8 Management Interface

2.8.1 Extended Register Access

2.8.2 Preamble Suppression

2.9 Two-Wire Serial Interface

2.9.1 Bus Operation

2.9.2 Read and Write Operations

2.9.2.1 Random Write

2.9.2.2 Sequential Write

2.9.2.3 Current Address Read

2.9.2.4 Random Read

2.9.2.5 Sequential Read

2.10 Auto-Negotiation

2.10.1 10/100/1000BASE-T Auto-Negotiation

2.10.2 1000BASE-X Auto-Negotiation

2.10.3 SGMII Auto-Negotiation

2.10.3.1 SGMII MAC Interface Auto-Negotiation

2.10.3.2 SGMII Media Interface Auto-Negotiation

2.10.4 GBIC Mode Auto-Negotiation

2.10.5 Auto-Media Detect Auto-Negotiation

2.10.6 Serial Interface Auto-Negotiation Bypass Mode

2.11 Fiber/Copper Auto-Selection

2.11.1 Preferred Media

2.11.2 Definition of link in SGMII Media Interface in the context of auto media selection

2.11.3 Notes on Determining which Media Linked Up

2.11.3.1 Polling Method 1

2.11.3.2 Polling Method 2

2.12 Downshift Feature

2.13 Virtual Cable Tester® (VCT™)

2.14 Data Terminal Equipment (DTE) Detect

2.15 CRC Error Counter and Packet Counter

2.15.1 Enabling The CRC Error Counter and Packet Counter

2.16 Packet Generator

2.17 MDI/MDIX Crossover

2.18 Polarity Correction

2.19 EEPROM Interface

2.19.1 Initializing the PHY with an EEPROM

2.19.2 Host Read and Write Commands to EEPROM and non- EEPROM Devices

2.19.3 Read and Write Commands

2.19.4 PHY Register Initialization

2.19.5 Bridging Function

2.19.5.1 Read from Two-Wire Serial Interface slave device to the MDIO

2.19.5.2 Write from MDIO into the Two-Wire Serial Interface slave device

2.19.6 INIT Functionality

2.20 Interrupt

2.21 LED

2.21.1 LED Polarity

2.21.2 Pulse Stretching and Blinking

2.21.3 Bi-Color LED Mixing

2.21.4 Modes of Operation

2.21.4.1 Compound Single LED Statuses

2.21.4.2 Speed Blink

2.21.4.3 Manual Override

2.21.4.4 MODE 1, MODE 2, MODE 3, MODE 4

Section 3. Register Description

Section 4. Electrical Specifications

4.1. Absolute Maximum Ratings

4.2. Recommended Operating Conditions

4.3. Package Thermal Information

4.4. Current Consumption

4.4.1 Current Consumption VDDO

4.4.2 Current Consumption VDDAH

4.4.3 Current Consumption VDDAL

4.4.4 Current Consumption VDDA

4.4.5 Current Consumption Center Tap

4.4.6 Current Consumption DVDD

4.4.7 Current Consumption F_VTT

4.4.8 Current Consumption S_VTT

4.5. DC Operating Conditions

4.5.0.1 Digital Pins

4.5.1 Internal Resistor Description

4.5.2 IEEE DC Transceiver Parameters

4.5.3 Fiber and MAC Interface

4.5.3.1 Transmitter DC Characteristics

4.5.3.2 Common Mode Voltage (Voffset) Calculations

4.5.3.3 Receiver DC Characteristics

4.6. AC Electrical Specifications

4.6.1 Reset Timing

4.6.2 XTAL1/XTAL2 Timing

4.6.3 STATUS[1:0] to CONFIG[5:0] Timing

4.7. SGMII MAC Interface Timing

4.7.1 Serial Interface and SGMII Output AC Characteristics

4.7.2 Serial Interface and SGMII Input AC Characteristics

4.8. 1000BASE-X,SGMII Media Interface and 100BASE-FX Interface Timing

4.9. MDC/MDIO Timing

4.10. Two-Wire Serial Interface (Slave) Timing

4.11. Two-Wire Serial Interface (Master) Timing

4.12. IEEE AC Transceiver Parameters

4.13. Latency Timing

4.13.1 SGMII MAC Interface/GBIC to 10/100/1000BASE-T Transmit Latency Timing

4.13.2 10/100/1000BASE-T to SGMII MAC Interface/GBIC Receive Latency Timing

4.13.3 SGMII MAC Interface to SGMII Media Interface/1000BASE-X Transmit Latency Timing

4.13.4 SGMII Media Interface/1000BASE-X to SGMII MAC Interface Receive Latency Timing

4.13.5 SGMII MAC Interface to 100BASE-FX Transmit Latency Timing

4.13.6 100BASE-FX to SGMII MAC Interface Receive Latency Timing

Section 5. Mechanical Drawings

5.1 64 - Pin 9x9 mm QFN Package

Section 6. Order Information

6.1 Ordering Part Numbers and Package Markings

88E1112 Datasheet Integrated 10/100/1000 Gigabit Ethernet Transceiver Doc. No. MV-S101384-00, Rev. G February 21, 2007

88E1112 Integrated 10/100/1000 Gigabit Ethernet Transceiver Document Status Advance Information Preliminary Information Final Information Revision Code: Rev. G Advance This document contains design specifications for initial product development. Specifications may change without notice. Contact Marvell Field Application Engineers for more information. This document contains preliminary data, and a revision of this document will be published at a later date. Specifications may change without notice. Contact Marvell Field Application Engineers for more information. This document contains specifications on a product that is in final release. Specifications may change without notice. Contact Marvell Field Application Engineers for more information. Technical Publication: 1.50 No part of this document may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, for any purpose, without the express written permission of Marvell. Marvell retains the right to make changes to this document at any time, without notice. Marvell makes no warranty of any kind, expressed or implied, with regard to any information contained in this document, including, but not limited to, the implied warranties of merchantability or fitness for any particular purpose. Further, Marvell does not warrant the accuracy or completeness of the information, text, graphics, or other items contained within this document. Marvell products are not designed for use in life-support equipment or applications that would cause a life-threatening situation if any such products failed. Do not use Marvell products in these types of equipment or applications. With respect to the products described herein, the user or recipient, in the absence of appropriate U.S. government authorization, agrees: 1) Not to re-export or release any such information consisting of technology, software or source code controlled for national security reasons by the U.S. Export Control Regulations ("EAR"), to a national of EAR Country Groups D:1 or E:2; 2) Not to export the direct product of such technology or such software, to EAR Country Groups D:1 or E:2, if such technology or software and direct products thereof are controlled for national security reasons by the EAR; and, 3) In the case of technology controlled for national security reasons under the EAR where the direct product of the technology is a complete plant or component of a plant, not to export to EAR Country Groups D:1 or E:2 the direct product of the plant or major component thereof, if such direct product is controlled for national security reasons by the EAR, or is subject to controls under the U.S. Munitions List ("USML"). At all times hereunder, the recipient of any such information agrees that they shall be deemed to have manually signed this document in connection with their receipt of any such information. Copyright © 2007. Marvell International Ltd. All rights reserved. Marvell, the Marvell logo, Moving Forward Faster, Alaska, Fastwriter, Datacom Systems on Silicon, Libertas, Link Street, NetGX, PHYAdvantage, Prestera, Raising The Technology Bar, The Technology Within, Virtual Cable Tester, and Yukon are registered trademarks of Marvell. Ants, AnyVoltage, Discovery, DSP Switcher, Feroceon, GalNet, GalTis, Horizon, Marvell Makes It All Possible, RADLAN, UniMAC, and VCT are trademarks of Marvell. All other trademarks are the property of their respective owners. Doc. No. MV-S101384-00 Rev. G CONFIDENTIAL Page 2 Document Classification: Proprietary Information Copyright © 2007 Marvell February 21, 2007, Advance

88E1112 Integrated 10/100/1000 Gigabit Ethernet Transceiver Overview The Alaska® 88E1112 Gigabit Ethernet Transceiver is a physical layer device for Ethernet 1000BASE-T, 100BASE-TX, and 10BASE-T applications. It is manufactured using standard digital CMOS process and contains all the active circuitry required to implement the physical layer functions to transmit and receive data on standard CAT 5 unshielded twisted pair. The Alaska 88E1112 device supports the Serial Gigabit Media Independent Interface (SGMII) for direct connection to a MAC/Switch port. The 88E1112 device incorporates an additional 1.25 GHz SERDES (Serializer/Deserializer) which may be connected directly to a fiber-optic transceiver for 1000BASE-X applications. The SERDES is switch- able to support 125 MHz operation for 100BASE- FX applications. Additionally, the 88E1112 device may be used to implement 10/100/1000BASE-T Gigabit Interface Converter (GBIC) or Small Form Factor Pluggable (SFP) modules. The 88E1112 device uses advanced mixed-signal processing to perform equalization, echo and crosstalk cancellation, data recovery, and error cor- rection at a gigabit per second data rate. The device achieves robust performance in noisy envi- ronments with very low power dissipation. • • • • • • Features • • • • 10/100/1000BASE-T IEEE 802.3 compliant Supports Serial Gigabit Media Independent Interface (SGMII) Integrated 1.25 GHz SERDES for 1000BASE-X fiber applications Integrated 125 MHz SERDES for 100BASE-FX fiber applications SGMII to SERDES mode supported SGMII to SGMII bridging supported Supports tri-speed GBIC/SFP applications • • • • Media Detection™ mode for copper and fiber support • Integrated Virtual Cable Tester® (VCT™) cable diag- nostic feature 2-pair downshift feature Auto-MDI/MDIX feature when link partner Auto-Negoti- ation enabled or disabled Advanced diagnostics: CRC error checker, packet counter, pattern generator EEPROM support for PHY configuration Selectable MDC/MDIO interface or Two-Wire Serial Interface Fully integrated digital adaptive equalizers, echo can- cellers, and crosstalk cancellers Advanced digital baseline wander correction Automatic polarity correction IEEE 802.3u compliant Auto-Negotiation Requires only two supplies: 2.5V and 1.2V Very low power dissipation PAVE = 0.75W • • • • • • Manufactured in a 64-Pin QFN, 9X9 mm package • Available in Commercial or Industrial grade Copyright © 2007 Marvell CONFIDENTIAL Doc. No. MV-S101384-00, Rev. G February 21, 2007, Advance Document Classification: Proprietary Information Page 3

88E1112 Integrated 10/100/1000 Gigabit Ethernet Transceiver 10/100/1000 Mbps Ethernet MAC Alaska® 88E1112 MAC Interface - SGMII T r a n s f o r m e r RJ45 Media Type: - 1000BASE-T - 100BASE-TX - 10BASE-T Alaska 88E1112 used in Copper Applications 10/100/1000 Mbps Ethernet MAC Alaska® 88E1112 SERDES Fiber Optics Media Types: - 1000BASE-X MAC Interface - SGMII M A G RJ45 OR Media Type: - 1000BASE-T - 100BASE-TX - 10BASE-T Alaska 88E1112 used in Media Detect™ Applications (1000BASE-X SERDES) 10/100/1000 Mbps Ethernet MAC Alaska® 88E1112 SGMII SFP Interface Media Type: - 1000BASE-X - 100BASE-FX - 10/100/1000 BASE-T MAC Interface - SGMII M A G RJ-45 Media Type: - 1000BASE-T - 100BASE-TX - 10BASE-T Alaska 88E1112 used in Media Detect ™ Applications (SGMII) Switch Board GBIC/SFP Card 1000 Mbps only Ethernet MAC SERDES GBIC/SFP Interface TBI SERDES SERDES Optional EEPROM Alaska® 88E1112 T r a n s f o r m e r RJ45 Media Type: - 1000BASE-T Alaska 88E1112 used in 1000BASE-T GBIC/ SFP Applications 10/100/1000 Mbps Ethernet MAC SGMII Clock 2 SGMII Data 4 MAC Interface - 6 pin SGMII - 4 pin SGMII Alaska® 88E1112 4B/5B 125 MHz 100BASE-FX Interface 4 100BASE-FX Fiber Transceiver Media Type: - 100BASE-FX Alaska 88E1112 used in Traditional 100BASE-FX Applications Doc. No. MV-S101384-00, Rev. G CONFIDENTIAL Copyright © 2007 Marvell Page 4 Document Classification: Proprietary Information February 21, 2007, Advance

Switch Board GBIC/SFP Card Optional EEPROM 10/100/1000 Mbps Ethernet MAC GBIC/SFP Interface SGMII SGMII Alaska® 88E1112 T r a n s f o r m e r RJ45 Media Type: - 1000BASE-T - 100BASE-TX - 10BASE-T Alaska 88E1112 used in 10/100/1000BASE-T tri-speed GBIC/SFP Applications Switch Board GBIC/SFP Card MAC GBIC/SFP Interface SGMII SGMII Interface Alaska® 88E1112 Optical Components Media Type: - 100BASE-FX Alaska 88E1112 used in 100BASE-FX GBIC/SFP Applications Fiber Transceiver SERDES Alaska® 88E1112 T r a n s f o r m e r RJ45 Media Type: - 1000BASE-T Alaska 88E1112 used in Media Converter Applications 10/100/1000 Mbps Ethernet MAC SGMII Clock 2 SGMII Data 4 MAC Interface - 6 pin SGMII - 4 pin SGMII Alaska® 88E1112 SGMII Data 4 SFP Interface Media Type: - 1000BASE-X - 100BASE-FX - 10/100/1000 BASE-T Alaska 88E1112 used in 4-pin SGMII to 6-pin SGMII Conversions Copyright © 2007 Marvell CONFIDENTIAL Doc. No. MV-S101384-00, Rev. G February 21, 2007, Advance Document Classification: Proprietary Information Page 5

88E1112 Integrated 10/100/1000 Gigabit Ethernet Transceiver Table of Contents SECTION 1. SIGNAL DESCRIPTION................................................................... 9 1.1 88E1112 64-Pin QFN Package .......................................................................................9 1.2 Pin Description .............................................................................................................10 1.2.1 Pin Type Definitions.......................................................................................................... 10 64-Pin QFN Pin Assignment List - Alphabetical by Signal Name ............................18 1.3 SGMII MAC Interface to Auto Media Detect 10BASE-T/100BASE-TX/1000BASE-T/1000BASE-X SGMII MAC Interface to Auto Media Detect 10BASE-T/100BASE-TX/1000BASE-T/SGMII Media In- 2.2 SECTION 2. FUNCTIONAL SPECIFICATIONS..................................................... 19 2.1 Data Interfaces..............................................................................................................20 2.1.1 MAC Interface................................................................................................................... 20 2.1.2 Fiber Interface .................................................................................................................. 25 88E1112 Device Modes of Operation..........................................................................26 2.2.1 26 2.2.2 terface 28 2.2.3 GBIC to 1000BASE-T....................................................................................................... 29 SGMII MAC Interface to 100BASE-FX ............................................................................. 30 2.2.4 2.3 Loopback.......................................................................................................................31 2.3.1 MAC Interface Loopback .................................................................................................. 31 2.3.2 Copper Interface Loopback .............................................................................................. 33 2.3.3 Fiber Interface Loopback.................................................................................................. 34 External Loopback............................................................................................................ 35 2.3.4 2.4 Hardware Configuration...............................................................................................37 2.5 Copper Media Transmit and Receive Function .........................................................39 Transmit Side Network Interface ...................................................................................... 39 2.5.1 2.5.2 Encoder ............................................................................................................................ 39 2.5.3 Receive Side Network Interface ....................................................................................... 39 2.5.4 Decoder ............................................................................................................................ 41 2.6 Power Supplies.............................................................................................................42 VDDA, VDDAH ................................................................................................................. 42 2.6.1 VDDAL.............................................................................................................................. 42 2.6.2 F_VTT and S_VTT ........................................................................................................... 42 2.6.3 2.6.4 DVDD ............................................................................................................................... 42 VDDO ............................................................................................................................... 42 2.6.5 Power Supply Sequencing ............................................................................................... 42 2.6.6 2.7 Power Management......................................................................................................43 Low Power Modes ............................................................................................................ 43 Low Power Operating Modes ........................................................................................... 43 SGMII MAC Interface Effect on Low Power Modes.......................................................... 44 2.8 Management Interface..................................................................................................45 2.7.1 2.7.2 2.7.3 Doc. No. MV-S101384-00,Rev. G CONFIDENTIAL Copyright © 2007 Marvell Page 6 Document Classification: Proprietary Information February 21, 2007, Advance

2.8.1 2.8.2 Extended Register Access ................................................................................................46 Preamble Suppression......................................................................................................46 2.9 Two-Wire Serial Interface ............................................................................................ 47 2.9.1 Bus Operation ...................................................................................................................47 2.9.2 Read and Write Operations...............................................................................................48 2.10 Auto-Negotiation.......................................................................................................... 51 2.10.1 10/100/1000BASE-T Auto-Negotiation..............................................................................51 2.10.2 1000BASE-X Auto-Negotiation .........................................................................................52 2.10.3 SGMII Auto-Negotiation ....................................................................................................53 2.10.4 GBIC Mode Auto-Negotiation............................................................................................55 2.10.5 Auto-Media Detect Auto-Negotiation.................................................................................55 2.10.6 Serial Interface Auto-Negotiation Bypass Mode................................................................55 2.11 Fiber/Copper Auto-Selection ...................................................................................... 56 2.11.1 Preferred Media.................................................................................................................56 2.11.2 Definition of link in SGMII Media Interface in the context of auto media selection............56 2.11.3 Notes on Determining which Media Linked Up .................................................................57 2.12 Downshift Feature........................................................................................................ 58 2.13 Virtual Cable Tester® (VCT™) .................................................................................... 59 2.14 Data Terminal Equipment (DTE) Detect ..................................................................... 61 2.15 CRC Error Counter and Packet Counter.................................................................... 62 2.15.1 Enabling The CRC Error Counter and Packet Counter.....................................................62 2.16 Packet Generator ......................................................................................................... 62 2.17 MDI/MDIX Crossover.................................................................................................... 63 2.18 Polarity Correction....................................................................................................... 64 2.19 EEPROM Interface ....................................................................................................... 65 2.19.1 Initializing the PHY with an EEPROM ...............................................................................65 2.19.2 Host Read and Write Commands to EEPROM and non-EEPROM Devices ....................65 2.19.3 Read and Write Commands ..............................................................................................65 2.19.4 PHY Register Initialization.................................................................................................67 2.19.5 Bridging Function ..............................................................................................................68 2.19.6 INIT Functionality ..............................................................................................................69 2.20 Interrupt ........................................................................................................................ 69 2.21 LED............................................................................................................................... 70 2.21.1 LED Polarity ......................................................................................................................71 2.21.2 Pulse Stretching and Blinking............................................................................................72 2.21.3 Bi-Color LED Mixing ..........................................................................................................73 2.21.4 Modes of Operation...........................................................................................................74 SECTION 3. REGISTER DESCRIPTION..............................................................80 SECTION 4. ELECTRICAL SPECIFICATIONS....................................................146 4.1. Absolute Maximum Ratings...................................................................................... 146 Copyright © 2007 Marvell CONFIDENTIAL Doc. No. MV-S101384-00, Rev. G February 21, 2007, Advance Document Classification: Proprietary Information Page 7

88E1112 Integrated 10/100/1000 Gigabit Ethernet Transceiver 4.5.1 4.5.2 4.5.3 4.2. Recommended Operating Conditions......................................................................147 4.3. Package Thermal Information ...................................................................................148 4.4. Current Consumption ................................................................................................149 4.4.1 Current Consumption VDDO .......................................................................................... 149 4.4.2 Current Consumption VDDAH........................................................................................ 150 4.4.3 Current Consumption VDDAL ........................................................................................ 151 4.4.4 Current Consumption VDDA .......................................................................................... 152 4.4.5 Current Consumption Center Tap .................................................................................. 153 4.4.6 Current Consumption DVDD .......................................................................................... 154 4.4.7 Current Consumption F_VTT ......................................................................................... 155 4.4.8 Current Consumption S_VTT ......................................................................................... 155 4.5. DC Operating Conditions...........................................................................................156 Internal Resistor Description .......................................................................................... 156 IEEE DC Transceiver Parameters.................................................................................. 157 Fiber and MAC Interface ................................................................................................ 158 4.6. AC Electrical Specifications......................................................................................164 4.6.1 Reset Timing .................................................................................................................. 164 4.6.2 XTAL1/XTAL2 Timing..................................................................................................... 166 STATUS[1:0] to CONFIG[5:0] Timing............................................................................. 166 4.6.3 4.7. SGMII MAC Interface Timing .....................................................................................167 Serial Interface and SGMII Output AC Characteristics................................................... 167 Serial Interface and SGMII Input AC Characteristics ..................................................... 167 4.8. 1000BASE-X,SGMII Media Interface and 100BASE-FX Interface Timing...............168 4.9. MDC/MDIO Timing ......................................................................................................169 4.10. Two-Wire Serial Interface (Slave) Timing.................................................................170 4.11. Two-Wire Serial Interface (Master) Timing...............................................................172 4.12. IEEE AC Transceiver Parameters .............................................................................173 4.13. Latency Timing ...........................................................................................................174 4.13.1 SGMII MAC Interface/GBIC to 10/100/1000BASE-T Transmit Latency Timing ............ 174 4.13.2 10/100/1000BASE-T to SGMII MAC Interface/GBIC Receive Latency Timing ............. 175 4.13.3 SGMII MAC Interface to SGMII Media Interface/1000BASE-X Transmit Latency Timing176 4.13.4 SGMII Media Interface/1000BASE-X to SGMII MAC Interface Receive Latency Timing177 4.13.5 SGMII MAC Interface to 100BASE-FX Transmit Latency Timing.................................. 178 4.13.6 100BASE-FX to SGMII MAC Interface Receive Latency Timing................................... 179 4.7.1 4.7.2 SECTION 5. MECHANICAL DRAWINGS.......................................................... 180 5.1 64 - Pin 9x9 mm QFN Package ..................................................................................180 SECTION 6. ORDER INFORMATION............................................................... 182 6.1 Ordering Part Numbers and Package Markings......................................................182 Doc. No. MV-S101384-00,Rev. G CONFIDENTIAL Copyright © 2007 Marvell Page 8 Document Classification: Proprietary Information February 21, 2007, Advance

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