A311D Quick Reference Manual V0.4.pdf

发布时间：2022-06-28 发布人：admin 分类：说明书资料大小：2.06M 资料格式：pdf 举报版权申诉

5ae45bec-7306-4cd6-9b05-09b9fe5ec1c3.pdf-第1页.png

第1页 / 共79页

5ae45bec-7306-4cd6-9b05-09b9fe5ec1c3.pdf-第2页.png

第2页 / 共79页

5ae45bec-7306-4cd6-9b05-09b9fe5ec1c3.pdf-第3页.png

第3页 / 共79页

5ae45bec-7306-4cd6-9b05-09b9fe5ec1c3.pdf-第4页.png

第4页 / 共79页

5ae45bec-7306-4cd6-9b05-09b9fe5ec1c3.pdf-第5页.png

第5页 / 共79页

5ae45bec-7306-4cd6-9b05-09b9fe5ec1c3.pdf-第6页.png

第6页 / 共79页

5ae45bec-7306-4cd6-9b05-09b9fe5ec1c3.pdf-第7页.png

第7页 / 共79页

5ae45bec-7306-4cd6-9b05-09b9fe5ec1c3.pdf-第8页.png

第8页 / 共79页

文本预览

A311D Quick Reference Manual Revision: 04 Release Date: 2019-09-10 Amlogic, Ltd.

A311D Quick Reference Manual 04 (2019-09-10) Amlogic, Ltd. Proprietary i COPYRIGHT © 2019 Amlogic, Ltd. All rights reserved. No part of this document may be reproduced, transmitted, transcribed, or translated into any language in any form or by any means without the written permission of Amlogic, Ltd. TRADEMARKS AMLOGIC is a trademark of Amlogic, Ltd. All other trademarks and registered trademarks are property of their respective companies. DISCLAIMER Amlogic Ltd. may make improvements and/or changes in this document or in the product described in this document at any time. This product is not intended for use in medical, life saving, or life sustaining applications. Circuit diagrams and other information relating to products of Amlogic Ltd. are included as a means of illustrating typical applications. Consequently, complete information sufficient for production design is not necessarily given. Amlogic makes no representations or warranties with respect to the accuracy or completeness of the contents presented in this document. CONTACT INFORMATION Amlogic, Ltd. 2518 Mission College Blvd, Suite 120 Santa Clara, CA 95054 U.S.A. www.amlogic.com

A311D Quick Reference Manual Change History 04 (2019-09-10) Amlogic, Ltd. Proprietary ii Change History Issue 04 (2019-09-10) This is the 04 version. Compared to last version, the following topics are changed. Section Change Description 1.1 and 1.2 Updated description of the NPU. Issue 03 (2019-08-07) This is the 03 version. Compared to last version, the following topics are changed. Section Change Description 1.2 Updated the frequency spec of DDR4. Changed spec of nerual network accelerator. Issue 02 (2019-07-17) This is the 02 version. Compared to last version, the following topics are changed. Section Change Description 1.1 and 1.2 Updated Vulkan 1.0 to Vulkan 1.1. Modified Mali-G52 MP6 to Mali-G52 MP4 (6EE). 1.2 Updated the figure. Issue 01 (2019-05-05) This is the 01 version. Compared to A311D Quick Reference Manual (0.7), the following topics are changed. Section Change Description 2.3 Added a note that some GPIOAO pins can be reset by watchdog. 3 Modified the chapter title. 3.3 Added a note of ripple voltage after the table 3.4 Modified thermo resistance value. 3.5.1 Added two notes of min and max value of RPD explaining the GPIO pin voltage in test condition. 3.7.1 Added note after Table 3-2 that driving strength of OD pin is not adjustabe. 3.7.7 ⚫ Modified the specs of tHC, tLC and tRC in Table 3-14 and Table 3-15 ⚫ Updated timing figures from Figure 3-16 to Figure 3-19 4 and 5 Changed these two sections into chapters. 5 Updated the power on sequence figure. 6 Updated the dimension figure.

A311D Quick Reference Manual Contents 04 (2019-09-10) Amlogic, Ltd. Proprietary iii Contents 1. General Information .................................................................................................................................... 1 1.1 Overview ....................................................................................................................................... 1 1.2 Features........................................................................................................................................ 2 2. Pin Out Specification ................................................................................................................................... 6 2.1 Pin-Out Diagram (top view) .......................................................................................................... 6 2.2 Pin Order ...................................................................................................................................... 7 2.3 Pin Description ........................................................................................................................... 13 2.4 Pin Multiplexing Tables .............................................................................................................. 31 2.5 Signal Descriptions ..................................................................................................................... 39 3. Electrical Characteristics ........................................................................................................................... 49 3.1 Absolute Maximum Ratings........................................................................................................ 49 3.2 Recommended Operating Conditions ........................................................................................ 49 3.3 Ripple Voltage Specification....................................................................................................... 50 3.4 Thermal Resistance ................................................................................................................... 51 3.5 DC Electrical Characteristics ...................................................................................................... 51 3.5.1 Normal GPIO Specifications (For DIO) ................................................................................ 51 3.5.2 Open Drain GPIO Specifications (For DIO_OD) .................................................................. 52 3.5.3 DDR3/DDR3L/DDR4/LPDDR3/LPDDR4 SDRAM Specifications ........................................ 52 3.6 Recommended Oscillator Electrical Characteristics .................................................................. 53 3.7 Timing Information ...................................................................................................................... 54 3.7.1 I2C Timing Specification ....................................................................................................... 54 3.7.2 EMMC/SDIO Timing Specification ....................................................................................... 55 3.7.3 NAND Timing Specification .................................................................................................. 58 3.7.4 SPICC Timing Specification ................................................................................................. 60 3.7.5 SPIFC Timing Specification .................................................................................................. 60 3.7.6 Ethernet Timing Specification ............................................................................................... 62 3.7.7 Audio Timing Specification ................................................................................................... 64 3.7.8 PDM Timing Specification .................................................................................................... 66 3.7.9 UART Timing Specification .................................................................................................. 68 3.8 Power Consumption ................................................................................................................... 69 3.9 Storage and Baking Conditions .................................................................................................. 70 4. Power On Config ....................................................................................................................................... 71 5. Recommended Power on/down Sequence .............................................................................................. 72 6. Mechanical Dimensions ............................................................................................................................ 73

A311D Quick Reference Manual Contents 04 (2019-09-10) Amlogic, Ltd. Proprietary iv 7. Ordering Guide .......................................................................................................................................... 74

A311D Quick Reference Manual 1 General Information 04 (2019-09-10) Amlogic, Ltd. Proprietary 1 1. General Information 1.1 Overview A311D is an advanced AI application processor designed for hybrid OTT/IP Set Top Box(STB) and high-end media box applications. It integrates a powerful CPU, GPU and NPU optional (Neural Processing Unit) subsystem, a secured 4K video CODEC engine and a best-in-class HDR image processing pipeline with all major peripherals to form the ultimate high-performance AI multimedia AP. The main system CPU is based on Big.Little architecture which integrates a quad-core ARM Cortex-A73 CPU cluster and a dual-core Cortex-A53 cluster with united L2 cache to improve system performance. Each CPU core includes the separate NEON SIMD co-processor to improve software media processing capability. There is also the NPU supporting INT8 inference for all popular deep learning frameworks including TensorFlow and Caffe. The graphic subsystem consists of two graphic engines and a flexible video/graphic output pipeline. The ARM MaliTM-G52 MP4(6EE) GPU handles all OpenGL ES 3.2 Vulkan 1.1 and OpenCL 2.0 graphic programs, while the 2.5D graphics processor handles additional scaling, alpha, rotation and color space conversion operations. Together, the CPU and GPU handle all operating system, networking, user-interface and gaming related tasks. The video output pipeline includes Dolby Visionoptional, advanced HDR10, HDR10+, HLG and PRIME HDR processing, REC709/BT2020 processing, motion adaptive edge enhancing de-interlacing, flexible programmable scalar, and many picture enhancement filters before passing the enhanced image to the video output ports. Amlogic Video Engine (AVE-10) offloads the Cortex-A53 CPUs from all video CODEC processing. It includes dedicated hardware video decoder and encoder. AVE-10 is capable of decoding 4Kx2K resolution video at 75fps with complete Trusted Video Path (TVP) for secure applications and supports full formats including MVC, MPEG-1/2/4, VC-1/WMV, AVS, AVS+, AVS2 RealVideo, MJPEG streams, H.264, H265-10, VP9 and also JPEG pictures with no size limitation. The independent encoder is able to encode in JPEG or H.265/H.264 up to 1080p at 60fps. A311D integrates all standard audio/video input/output interfaces including a HDMI2.1 transmitter with 3D, Dynamic HDR, CEC and HDCP 2.2 support, stereo audio DAC, a CVBS output, 4-lane MIPI DSI interface, multiple TDM, PCM, I2S and SPDIF digital audio input/output interfaces, and 8 channel far-field PDM digital microphone (DMIC) inputs. A 4-lane MIPI-CSI and DVP interface is available to support up to 8MP camera input with the built-in high-quality ISP. A311D also integrates a set of functional blocks for digital TV broadcasting streams. The built-in two demux can process the TV streams from the serial and parallel transport stream input interface, which can connect to external tuner/demodulator. The processor has rich advanced network and peripheral interfaces, including a 10/100/1000M Ethernet MAC with RGMII, 10/100M Ethernet PHY, one USB XHCI OTG 2.0 ports, one USB3.0 and PCIe 2.0 combo interface and multiple SDIO/SD card controllers,UART, I2C, high-speed SPI and PWMs. Standard development environment utilizing GNU/GCC Android tool chain is supported. Please contact your AMLOGIC sales representative for more information.

A311D Quick Reference Manual 1 General Information 04 (2019-09-10) Amlogic, Ltd. Proprietary 2 1.2 Features CPU Sub-system • Quad core ARM Cortex-A73 and dual core ARM Cortex-A53 CPU • ARMv8-A architecture with Neon and Crypto extensions • Unified system L2 cache • Build-in Cortex-M4 core for always on processing • Advanced TrustZone security system • Application based traffic optimization using internal QoS-based switching fabrics NPU • Neural network accelerator (NNA) with programmable engine (PPU) architecture • 4 NNA with INT8 inference performance up to 5Tops • 1 programmable processing unit (PPU) up to 12.8 GFLOPS FP16 or 6.4 GFLOPS FP32 • 512KB cache and 1MB on chip buffer 3D Graphics Processing Unit • ARM G52 MP4(6EE) GPU • 8-wide warps, 2x dual texture pipe, 6x 8-wide execution engines (EE) • Concurrent multi-core processing • OpenGL ES 3.2, Vulkan 1.1 and OpenCL 2.0 support 2.5D Graphics Processor • Fast bitblt engine with dual inputs and single output • Programmable raster operations (ROP)

A311D Quick Reference Manual 1 General Information 04 (2019-09-10) Amlogic, Ltd. Proprietary 3 • Programmable polyphase scaling filter • Supports multiple video formats 4:2:0, 4:2:2 and 4:4:4 and multiple pixel formats (8/16/24/32 bits graphics layer) • Fast color space conversion • Advanced anti-flickering filter Crypto Engine • AES/ block cipher with 128/256 bits keys, standard 16 bytes block size and streaming ECB, CBC and CTR modes • TDES block cipher with ECB and CBC modes supporting 64 bits key for DES and 192 bits key for 3DES • Hardware crypto key-ladder operation and DVB-CSA for transport stream encryption • Built-in hardware True Random Number Generator (TRNG), CRC and SHA-1/SHA-2/HMAC SHA engine Video/Picture CODEC • Amlogic Video Engine (AVE) with dedicated hardware decoders and encoders • Support multi-video decoder up to 4Kx2K@60fps+1x1080P@60fps • Supports multiple "secured" video decoding sessions and simultaneous decoding and encoding • Video/Picture Decoding o VP9 Profile-2 up to 4Kx2K@60fps o H.265 HEVC MP-10@L5.1 up to 4Kx2K@60fps o AVS2-P2 Profile up to 4Kx2K@60fps o H.264 AVC HP@L5.1 up to 4Kx2K@30fps o H.264 MVC up to 1080P@60fps o MPEG-4 ASP@L5 up to 1080P@60fps (ISO-14496) o WMV/VC-1 SP/MP/AP up to 1080P@60fps o AVS-P16(AVS+) /AVS-P2 JiZhun Profile up to 1080P@60fps o MPEG-2 MP/HL up to 1080P@60fps (ISO-13818) o MPEG-1 MP/HL up to 1080P@60fps (ISO-11172) o RealVideo 8/9/10 up to 1080P@60fps o Multiple language and multiple format sub-title video support o MJPEG and JPEG unlimited pixel resolution decoding (ISO/IEC-10918) o Supports JPEG thumbnail, scaling, rotation and transition effects o Supports *.mkv,*.wmv,*.mpg, *.mpeg, *.dat, *.avi, *.mov, *.iso, *.mp4, *.rm and *.jpg file formats • Video/Picture Encoding o Independent JPEG and H.265/H.264 encoder with configurable performance/bit-rate o JPEG image encoding o H.265/H.264 video encoding up to 1080P@60fps with low latency o DVP (ITU 601/656) camera interface o Supports YUV or RGB camera input formats 9th Generation Advanced Amlogic TruLife Image Engine • Supports Dolby VisionOptional, HDR10, HDR10+, and HLG HDR • Motion compensated noise reduction and 3D digital noise reduction for random noise • Block noise, mosquito noise, spatial noise, contour noise reduction • Motion compensated and motion adaptive de-interlacer

分享到：

赞收藏

资料库

A311D Quick Reference Manual V0.4.pdf

相关推荐

音视频

热门标签

最新资料