Advanced® 3.0 Release 2.0
PICMG® Base Specification
Introduction and objectives 1
1.1 Objective
1.1.1 Relationship to PICMG® 2.0 family of specifications
1.1.2 Statement of compliance
1.2 Reference documents
1.2.1 Reference specifications
1.2.2 Contact information for reference organizations
1.2.3 Environment and regulatory documents
1.3 Contributors
1.4 Special word usage
1.5 Name and logo usage
1.5.1 Logo use
1.5.2 Trademark policy
1.6 Signal naming conventions
1.7 Intellectual property
1.8 Special terms and acronyms
1.9 Dimensions
Mechanical 2
2.1 Mechanical overview
2.1.1 Tolerances
2.1.2 Standard orientation
2.1.3 Horizontal orientation
2.1.4 Drawing symbols
2.1.5 Keepout Zones
2.2 Front Board assembly
2.2.1 Front Board PCB dimensions
2.2.2 Front Board PCB thickness
2.2.3 Front Board Pitch and offset
2.2.4 Component height
2.2.4.1 Front Board warpage
2.2.4.2 Front Board stiffening
2.2.5 ESD discharge strip
2.2.6 Front Board covers
2.2.7 Front Board Face Plate
2.2.7.1 Front Board Face Plate Handles
2.2.7.2 Front Board Face Plate alignment and safety ground pin
2.2.7.3 Front Board Face Plate retention screws
2.2.7.4 Front Board filler panels
2.2.8 LEDs
2.2.8.1 General status LEDs
2.2.8.2 Application specific LEDs
2.2.9 Face Plate labels
2.2.9.1 AdvancedTCA® logo label
2.2.9.2 Barcode label
2.2.10 Test dimensions
2.3 RTM assembly
2.3.1 RTM direct mate to Front Board
2.3.1.1 RTM PCB thickness
2.3.1.2 RTM Pitch and offset
2.3.1.3 RTM PCB bow, warp, component height, and stiffening
2.3.1.4 RTM ESD discharge strip
2.3.1.5 RTM Face Plate and Covers
2.3.1.6 RTM Face Plate alignment/GND features
2.3.1.7 RTM retention screws
2.3.1.8 RTM filler panels
2.3.1.9 RTM airflow requirements and direction
2.3.1.10 Zone 3 airflow seal
2.3.1.11 RTM Zone 3 keying
2.3.2 Zone 3 cable bulkhead
2.3.3 RTM connection to Zone 3 midplane
2.4 Zone 1, 2, and 3 connectors
2.4.1 Zone 1 connector
2.4.1.1 Description
2.4.1.2 -48 VDC power circuit definitions
2.4.1.3 Metallic Test Bus circuits
2.4.1.4 Ringing Generator Bus circuit
2.4.1.5 Shelf management circuit definitions
2.4.2 Zone 2 connectors
2.4.2.1 General description of Zone 2 connectors
2.4.2.2 Pin numbering
2.4.2.3 Sequential mating
2.4.3 Zone 3 connectors
2.4.3.1 General description
2.4.3.2 Zone 3 connector envelope
2.4.3.3 Insertion force
2.4.3.4 Alignment allowances/gatherability
2.4.4 Front Board and RTM alignment/keying
2.4.4.1 Alignment overview
2.4.4.2 Keying overview
2.4.4.3 Zone 1 and Zone 2 keying/alignment
2.4.4.4 RTM alignment
2.4.4.5 Zone 3 alignment and keying
2.5 Backplanes
2.5.1 Description
2.5.2 Connector locations
2.6 Subrack
2.6.1 Subrack features
2.6.2 Backplane support bar
2.6.3 Subrack interface requirements for Front Boards
2.6.4 Subrack EMC gasketing requirements
2.6.5 Guide Rail requirements
2.6.5.1 Front Board and RTM Guide Rail requirements
2.6.5.2 Logical Slot identification
2.6.5.3 ESD clip position in the Guide Rails
2.6.6 Face Plate alignment and safety ground pin
2.6.7 Retention screw receptacle
2.6.8 Subrack load carrying capability
2.6.9 Subrack integrity tests
2.6.9.1 Subrack shock and vibration performance
2.6.9.2 Earthquake performance
2.6.9.3 Flammability
2.6.9.4 Shelf climatic test
2.6.9.5 Shelf atmosphere test
2.6.9.6 Insertion cycles
2.6.10 Physical Slot numbering
2.7 Shelf
2.7.1 Shelf types
2.7.2 Shelf width and Shelf height
2.7.3 Shelf depth
2.7.4 Air filter provision
2.7.5 ESD wrist strap interface
2.7.6 Telco inputs and alarm outputs
2.7.6.1 Telco alarm information
2.7.6.2 Telco alarm signaling I/O connector example
2.7.6.3 Telco alarm electrical specifications
2.7.6.4 Shelf alarm LEDs
2.7.7 Cable management
2.7.8 Power entry
2.7.8.1 Power entry space allocation
2.7.8.2 Position
2.7.8.3 Safety
2.7.8.4 Method
2.7.8.5 Switching
2.7.8.6 Fusing
2.7.8.7 Monitoring
2.7.8.8 Power filtering
2.7.9 Shelf mounting hole pattern and location
2.8 Frame and Subrack references (informative)
Shelf management 3
3.1 Overview
3.1.1 Shelf management architecture
3.1.2 Overall relationship with IPMI specification
3.1.3 Internet Protocol-based services
3.1.4 Multi-Tenant architectures
3.1.4.1 Multi-Tenant usage model origin
3.1.4.2 Areas of impact
3.1.5 Command and record definition conventions
3.1.5.1 IPMI command definition conventions
3.1.5.2 Type/Length Bytes
3.1.5.3 Handling Reserved bits and fields
3.1.6 IPMI specification clarifications
3.1.6.1 “Send Message” response format
3.1.6.2 Calculating MD2 and MD5 checksums
3.2 IPM Controller
3.2.1 Payload Interface
3.2.2 IPMI event support
3.2.2.1 Guidelines and requirements for FRU sensor events
3.2.3 Addressing
3.2.3.1 Hardware Address
3.2.3.2 Intelligent Platform Management Bus address
3.2.3.3 Physical Address
3.2.3.4 Shelf addressing
3.2.4 Managed FRU operational state management
3.2.4.1 FRU states and transitions
3.2.4.2 FRU Hot Swap commands
3.2.4.3 FRU Hot Swap Sensor
3.2.4.4 Communication Lost
3.2.4.5 FRU Payload Control
3.2.4.6 IPM Controller resets
3.2.5 Front Board Face Plate indicators
3.2.5.1 BLUE LED
3.2.5.2 LED 1 (mandatory)
3.2.5.3 LED 2 (optional)
3.2.5.4 LED 3 (optional)
3.2.5.5 Application specific LEDs (optional)
3.2.5.6 FRU LED Control commands
3.3 Shelf Manager
3.3.1 Overall Shelf Manager functional requirements
3.3.1.1 Basic IPMI requirements
3.3.1.2 Internet Protocol addressing of the Shelf Manager
3.3.1.3 IPMI-oriented System Manager communications
3.3.1.4 AdvancedTCA® extensions to IPMI’s BMC requirements
3.3.2 Shelf Manager initialization
3.4 Sensor Data Records
3.4.1 IPM Controller SDR requirements
3.4.2 Shelf Manager SDR requirements
3.4.3 Entities
3.4.3.1 PICMG Entity IDs
3.4.3.2 System and device relative Entities
3.4.3.3 Entity requirements
3.4.3.4 Example Entities and sensors
3.5 System Event Logs
3.6 FRU Information
3.6.1 FRU Information definitions
3.6.2 FRU Information access commands
3.6.3 IPM Controller FRU Information
3.6.4 Shelf FRU Information
3.6.4.1 Locating the Shelf FRU device(s)
3.6.4.2 Determining validity of Shelf FRU contents
3.6.4.3 Behavior if valid Shelf FRU Device not found or inaccessible
3.6.4.4 Accessing Shelf FRU Information
3.6.4.5 Updating Shelf FRU Information
3.7 Electronic Keying
3.7.1 E-Keying process
3.7.2 Point-to-Point E-Keying
3.7.2.1 Point-to-Point Link connectivity
3.7.2.2 Backplane Point-to-Point Connectivity information
3.7.2.3 Board Point-to-Point interface information
3.7.2.4 Set Port State command
3.7.2.5 Get Port State command
3.7.3 Bused E-Keying
3.7.3.1 Synchronization Clock Interface
3.7.3.2 Metallic Test Bus
3.7.3.3 Ringing Generator Bus
3.7.3.4 Bused Resource Control command
3.8 Intelligent Platform Management Bus
3.8.1 Radial IPMB-0 topology
3.8.1.1 Radial IPMB-0 Link Mapping Record requirements
3.8.2 Electrical characteristics
3.8.3 I2C requirements
3.8.4 IPMB Control commands
3.8.4.1 Physical IPMB-0 Sensors
3.8.4.2 Physical IPMB-0 Status Change Event Message
3.8.4.3 Set IPMB State
3.8.5 Hot Swap requirements
3.8.6 IPMB expansion connector
3.8.7 IPMB fault detection and control
3.9 Shelf power and cooling
3.9.1 Discovery stage
3.9.1.1 Shelf participation
3.9.1.2 Board/FRU participation
3.9.1.3 Fan Tray participation
3.9.2 Normal Operation Stage
3.9.2.1 Hot Swap insertion or extraction
3.9.2.2 Renegotiation of Power Level
3.9.2.3 Normal cooling adjustments
3.9.3 Abnormal Operation Stage
3.9.3.1 IPM Controller/FRU sensors
3.9.3.2 Abnormal Event Message
3.9.3.3 Cooling management
3.10 AdvancedTCA® IPMI functions, commands, and records
3.10.1 Required Shelf Manager and IPM Controller functions
3.10.2 Command assignments
3.10.3 AdvancedTCA® FRU Records, Sensors, and Entity IDs
Power distribution 4
4.1 Dual -48 VDC power distribution
4.1.1 Power architecture
4.1.2 Supported voltage levels
4.1.2.1 Voltage level background information (informative)
4.1.2.2 Voltage level requirements
4.1.3 Single or multiple Feeds to the Shelf and Backplane
4.1.4 Fusing and fault protection
4.1.4.1 Inrush current limiting
4.1.4.2 Battery Plant characterization for fusing (informative)
4.1.4.3 Transients
4.1.4.4 Fusing and local energy storage
4.1.5 Filtering
4.1.5.1 Board conducted emissions
4.1.5.2 Shelf Conducted emissions
4.1.5.3 Radiated emissions
4.1.6 Board power sequencing
4.1.6.1 Introduction
4.1.6.2 Power and ground sequencing
4.1.6.3 Management power
4.1.6.4 Payload power
4.2 Grounding strategy
4.2.1 Shelf Ground
4.2.2 Shelf Ground and -48 VDC return
4.2.3 Shelf Ground and Logic Ground
4.3 Board-level power conversion
4.3.1 Conversion architectures
4.3.2 DC to DC converter requirements
4.3.2.1 Power supply noise voltages
Thermal 5
5.1 General
5.1.1 Air cooling
5.2 Front Board thermal requirements
5.2.1 Front Board power dissipation
5.2.2 Front Board airflow direction
5.2.3 Front Board cooling requirements
5.2.3.1 Air distribution in a Slot
5.3 RTM thermal requirements
5.3.1 RTM power dissipation
5.3.2 RTM airflow direction
5.3.3 RTM Zone 3 airflow seal
5.4 Shelf thermal requirements
5.4.1 Shelf air inlet and exhaust
5.4.2 Slot cooling capability
5.4.2.1 Slot impedance curve
5.4.2.2 Slot fan flow curve
5.4.3 Shelf thermal requirements for Front Board
5.4.4 Shelf thermal support for RTM
5.5 Frame airflow
5.6 Thermal and acoustic noise environments
5.6.1 Airflow requirements
5.6.2 ETSI
5.6.3 NEBS
5.6.4 Altitude
5.6.5 Maximum temperature of human-accessible surfaces
5.6.6 Heat release target for high power Shelves and Frames
5.7 Fan failure
5.8 Air filters
5.9 Shelf temperature sensors
5.10 Design recommendations
5.10.1 Identify airflow path
5.10.1.1 Series paths
5.10.1.2 Parallel paths
5.10.2 Optimal distribution of airflow impedances
5.10.3 Calculating Shelf impedance, total volumetric airflow and airflow distribution
5.10.3.1 Example
5.10.4 Calculating temperature rise along each airflow path
5.10.5 Meeting worst case requirements
Data transport 6
6.1 General
6.1.1 Data transport zone (Zone 2)
6.2 Backplane requirements
6.2.1 Backplane fabric topologies
6.2.1.1 Dual Star
6.2.1.2 Dual-Dual Star
6.2.1.3 Full Mesh
6.2.2 Zone 2 interface support requirements
6.2.3 Electrical design requirements
6.2.3.1 Base and Fabric Interface requirements
6.2.3.2 Synchronization Clock Interface requirements
6.2.3.3 Update Channel Interface requirements
6.2.4 Electronic Keying support
6.3 Board requirements
6.3.1 Hub Boards
6.3.2 Node Boards
6.3.3 Mesh Enabled Boards
6.3.4 Zone 2 support requirements for Boards
6.3.4.1 Base Interface Board support
6.3.4.2 Fabric Interface - Board support
6.3.4.3 Synchronization Clock Interface - Board support
6.3.4.4 Update Channel Interface - Board support
6.3.5 Electronic Keying support
6.4 Data transport ZD connector
6.4.1 Base and Fabric Channels
6.4.2 Channel mapping
6.4.3 Pin mapping
6.4.4 Connector usage
6.5 Base Interface
6.5.1 Base Interface usage model
6.5.2 Base Interface Channel assignments
6.5.3 ShMC Port
6.5.4 Electrical design requirements
6.5.5 Base Interface Dual Star Backplane routing
6.5.6 Dual Star Backplane Hub Slot position
6.6 Fabric Interface
6.6.1 Fabric Interface usage models
6.6.2 Electrical design requirements
6.6.3 Fabric Interface Backplane configurations and Channel routing
6.6.3.1 Full Mesh Backplane
6.6.3.2 Fabric Interface Dual Star
6.6.3.3 Dual Star with Base (Fabric Star + Base Star)
6.6.3.4 Fabric Interface Dual-Dual Star
6.6.3.5 Reduced Slot Backplanes and Replicated Meshes
6.7 Synchronization Clock Interface
6.7.1 Clock bus architecture and Backplane topology
6.7.2 Board interfaces to clock buses
6.7.3 Bus group signal usage, frequencies, and quality
6.7.4 Synchronization system architectures and clock bus usage models
6.7.5 Redundancy model
6.7.6 Electronic Keying support
6.7.7 Electrical design requirements
6.8 Update Channel Interface
6.8.1 Update Channel overview / usage models
6.8.1.1 Backplane routing considerations
6.8.2 Electrical design requirements
6.9 System integration guidelines
Regulatory guidelines 7
7.1 All equipment
7.1.1 Safety (North America and Europe)
7.1.2 Electromagnetic compatibility (North America and Europe)
7.1.3 Safety and EMC: additional considerations
7.2 Equipment for use in telecommunications central offices
7.2.1 Safety
7.2.2 Electromagnetic compatibility
7.2.3 ETSI/NEBS requirements
7.2.3.1 NEBS-USA
7.2.3.2 ETSI-Europe
7.2.3.3 Additional customer-specific recommendations
7.3 Documentation
7.4 Grounding and bonding
7.5 Ecology standards
7.6 Reliability/MTBF standards
7.7 Cross reference list
Zone 2 electrical design guidelines 8
8.1 Overview
8.2 Backplane design guidelines
8.2.1 Signaling rates
8.2.2 Backplane materials
8.2.3 ZD Connector routing considerations and feature sizes
8.2.4 Base and Fabric Interface Backplane design guidelines
8.2.4.1 Trace length matching, trace widths and spacing
8.2.4.2 Crosstalk Isolation
8.2.4.3 Insertion loss
8.2.5 Synchronization Clock Interface Backplane design guidelines
8.2.5.1 MLVDS bused clock implementation
8.2.5.2 Characteristic impedance
8.2.5.3 Trace length matching, trace widths and spacing
8.2.5.4 Crosstalk Isolation
8.2.5.5 Termination
8.2.6 Update Channel Backplane electrical specifications
8.3 Board design guidelines
8.3.1 Board materials
8.3.2 ZD connector routing conditions
8.3.3 Base and Fabric Interface Board guidelines
8.3.3.1 Loose coupling vs. tight coupling in differential pairs
8.3.4 Update Channel Board design guidelines
Revision history 9
Differential Fabric Connector A
A.1 General data
A.1.1 Objective of this document
A.1.2 Scope
A.1.3 Intended method of mounting
A.1.4 Ratings and characteristics
A.1.5 Normative references
A.1.6 Markings
A.1.7 Type designation
A.2 Technical information
A.2.1 Definitions
A.2.1.1 Contacts and terminations
A.2.1.2 Complete connectors (pairs)
A.3 Dimensional information
A.3.1 General isometric view and common features
A.3.2 Engagement information
A.3.2.1 Electrical engagement length
A.3.2.2 First contact point
A.3.2.3 Perpendicular to engagement direction
A.3.2.4 Inclination
A.3.3 Backplane connectors
A.3.3.1 Dimensions
A.3.3.2 Contacts
A.3.3.3 Contact tip geometry
A.3.3.4 Terminations
A.3.4 Front Board Connectors
A.3.4.1 Dimensions
A.3.4.2 Terminations
A.3.5 Mounting information for Backplane connectors
A.3.5.1 Hole pattern on Backplanes
A.3.5.2 Backplane contact positional requirements
A.3.5.3 True position of male contacts
A.3.6 Mounting information for Front Board connectors
A.4 Characteristics
A.4.1 Climatic category
A.4.1.1 Climatic category test batch P: initial examination
A.4.1.2 Climatic category test batch A: mechanical tests
A.4.1.3 Climatic category test batch B: harsh environments
A.4.1.4 Climatic category test batch C: damp heat
A.4.1.5 Climatic category test batch D: extended environmental tests
A.4.1.6 Climatic category test batch E: extended environmental tests
A.4.2 Electrical characteristics
A.4.2.1 Impedance
A.4.2.2 Crosstalk
A.4.2.3 A.4.2.3 Propagation Delay
A.4.2.4 Insertion Loss
Power connector B
B.1 General data
B.1.1 Recommended method of mounting
B.1.2 Ratings and characteristics
B.1.3 Normative references
B.1.4 Marking
B.1.5 Type designation
B.1.6 Ordering information
B.2 Technical information
B.2.1 Definitions
B.2.1.1 Contacts and terminations
B.2.2 Information on application
B.2.2.1 Connector stacking
B.2.2.2 Backplane connectors
B.2.2.3 Front Board connectors
B.2.2.4 Information on contact terminations
B.2.3 Contact arrangements
B.2.3.1 Backplane connectors
B.2.3.2 Front Board connectors
B.3 Dimensional information
B.3.1 General
B.3.2 Isometric view and common features
B.3.2.1 Depth dimensions
B.3.3 Engagement (mating) information
B.3.3.1 Perpendicular to engagement (mating) direction
B.3.3.2 Inclination
B.3.3.3 Planarity
B.3.4 Backplane connectors
B.3.4.1 Dimensions
B.3.4.2 Terminations
B.3.5 Front Board connectors
B.3.5.1 Dimensions
B.3.5.2 Terminations
B.3.6 Mounting information for Backplane connectors
B.3.6.1 Hole pattern on Backplanes
B.3.7 Mounting information for Front Board connectors
B.3.7.1 Hole pattern on PCB
B.3.8 Gauges
B.3.8.1 Sizing gauges and retention force gauges
B.3.8.2 Test pin for probe damage
B.3.8.3 Test gauge for restricted entry
B.4 Characteristics
B.4.1 Climatic category
B.4.2 Electrical
B.4.2.1 Creepage and Clearance distances
B.4.2.2 Voltage proof
B.4.2.3 Current carrying capacity
B.4.2.4 Contact resistance
B.4.2.5 Insulation resistance
B.4.3 Mechanical
B.4.3.1 Mechanical operation
B.4.3.2 Insertion and withdrawal forces
B.4.3.3 Contact retention in insert
B.4.3.4 Contact bending strength
B.4.3.5 Static load (transverse)
B.4.3.6 Vibration (sinusoidal)
B.4.3.7 Shock
B.5 Test schedule
B.5.1 General
B.5.1.1 Arrangement for contact resistance measurement
B.5.1.2 Arrangement for dynamic stress tests
B.5.1.3 Arrangement for testing static load (transverse)
B.5.1.4 Wiring arrangements for voltage proof and insulation resistance tests
B.5.1.5 Arrangement for flammability test
B.5.1.6 Planarity of mounted connectors
B.5.1.7 Test printed Board for Backplane and Front Board connectors
B.5.2 Test schedule tables
B.5.2.1 Preliminary Group P
B.5.2.2 Test Group AP - dynamic/climatic
B.5.2.3 Test Group BP - mechanical endurance
B.5.2.4 Test Group CP - moisture
B.5.2.5 Test Group DP - electrical load
B.5.2.6 Test Group EP - mechanical resistivity
IPMB pull-up resistor calculations C
C.1 Calculations
C.2 Simulation results
Face Plate Handle design examples D
D.1 General data
D.1.1 Microswitch connections
D.2 PICMG 3.0 R1.0 Face Plate Handle
D.3 Rittal/Kaparel Face Plate Handle
D.4 Schroff Face Plate Handle
D.5 AMC Face Plate Handle